如何在多引导方案中为多个内核提供一小段内存

嗨！
我们正在使用一个基于Spartan 6LX9的小型FPGA板，用于复制古老的8位系统（参见zxuno.com）。
为了支持多个内核，我们使用Spartan 6芯片的多重引导功能，因此我们加载了一个主内核，它可以在屏幕上显示一个菜单，以选择要引导的内核。
我们支持的功能之一是能够使用复合视频/ RGB或VGA，共享相同的引脚，所以它是一个或另一个，但不是两个。
为了配置它，我们使用一个8位寄存器，用户可以配置该寄存器来存储VGA / RGB设置。
当选择新核心时，我们希望这个8位值在引导时“转移”到新核心，因此新核心可以自我调整以使用我们用于主核心的相同设置。
我们想在不借助外部存储器的情况下这样做。
可能吗？
Spartan 6 FPGA内部是否有任何内存不会在核心负载上重新配置并将其内容从内核保留到内核？
提前谢谢了！



以下为原文

Hi! We are working in a small Spartan 6LX9 based FPGA board that is used to replicate ancient 8-bit systems (see zxuno.com). In order to support more than one core, we use the multiboot features of the Spartan 6 chip, so we load a main core, which can present a menu on the screen to choose which core you want to boot with.

Among the features we support is the ability to either use composite video/RGB or VGA, sharing the same pins, so it's one or another, but not both. To configure this, we use a 8-bit register that can be configured by the user to store VGA/RGB settings.

When a new core is selected, we would like this 8-bit value to be "transfered" to the new core as it boots, so the new core could adapt itself to use the same settings we use for the main core.

We would like to do this without resorting to external memory. Is it possible? Is there any piece of memory inside the Spartan 6 FPGA that doesn't get reconfigured upon a core load and keep its contents from core to core?

Many thanks in advance!