如何在在Xilinx的推荐下招待替代的斯巴达6旁路电容器

嗨，
请注意，可以使用除这些表中提供的解耦方法之外的解耦方法，但解耦网络应设计为满足或超过此处提供的简单解耦网络的性能。
在100 KHz到500 MHz的频率范围内，备用网络的阻抗必须小于或等于推荐网络的阻抗。
您必须使用Xilinx推荐的电容器和电容器进行仿真，并确保网络的阻抗小于xilinx网络的阻抗。
但建议使用这些表中的电容并进行表征。
谢谢，AnirudhPS：请将此标记作为答案，以防它有助于解决您的问题。如果帖子引导您找到解决方案，请给予赞誉。



以下为原文

Hi,
 
Please note that the decoupling methods other than those presented in those tables can be used, but the decoupling network should be designed to meet or exceed the performance of the simple decoupling networks presented here. The impedance of the alternate network must be less than or equal to that of the recommended network across frequencies from 100 KHz to 500 MHz.
 
You would have to simulate with your capacitors for and the capacitors recommended by Xilinx and make sure the impedance of your network is less than then impedance of xilinx network.
 
The capacitances from these table however are recommended to be used and have been characterized.
Thanks,
Anirudh

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如果需要，通常可以用两个或更多个较小的大容量盖子替换一个大容量盖帽，以获得具有所需特性的盖帽。
通常，这使得生活更容易，因为组合部件的有效串联电阻和电感将低于每个单独部件。
因此，如果你能找到一个符合你的温度要求的47uF上限，它可以达到建议的ESR的两倍，只要你放置两倍于100uF部件的建议。
或者你可以去33uF，使用三倍，等等。
-  Gabor



以下为原文

It is generally OK to replace one large bulk cap with two or more smaller ones if necessary to get caps with the required characteristics.  Generally this makes life easier because the effective series resistance and inductance of the combined parts will be lower than for each individual part.  So if you can find a good 47uF cap that meets your requirements for temperature, it can have up to twice the recommended ESR as long as you place twice as many of these as the recommendation for 100uF parts.  Or you could go to 33uF and use three times as many, etc.
-- Gabor

有X7S 2.2uF 0402尺寸6.3V或10V电容，可用于每引脚去耦。
它们具有等于较低值0402电容器的高频特性。
使用2.2uF电容而不是0.1或0.47uF有助于减轻（减少）对额外体积（高值）电容的需求。
如果您使用足够的2.2uF电容进行每引脚去耦，则可能根本不需要任何批量去耦电容（取决于您的电路板设计和布局）。
对于大容量电容，建议使用X7S温度系数，以非常合理的成本提供以下一项或多项：
22uF 0805尺寸
47uF 1206尺寸
有33uF 1206尺寸的电容器，但它们的成本不低于47uF 1206尺寸的电容器。
digikey.com和mouser.com都有出色的元件选择工具，可帮助您寻找合适的电容器。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
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以下为原文

There are X7S 2.2uF 0402-size 6.3V or 10V capacitors which can be used for per-pin decoupling.  These have high-frequency characteristics equal to lower value 0402 capacitors.  Using 2.2uF caps instead of 0.1 or 0.47uF helps to mitigate (reduce) the need for additional bulk (high-value) capacitors.  If you use enough 2.2uF capacitors for per-pin decoupling, you may not need any bulk decoupling capacitors at all (depending on your board design and layout).
 
For bulk capacitance, suggest one or more of the following, readily available in X7S temperature coefficient, at very reasonable cost:

• 22uF  0805 size
  
• 47uF  1206 size
  

There are 33uF 1206 size capacitors, but they cost no less than 47uF 1206 size capacitors.
 
Both digikey.com and mouser.com have excellent component selection tools to aid your search for suitable capacitors.
 
-- Bob Elkind
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仅供参考：在您的帖子中，您提到“我的卡可能会获得+93 celzius”。
请注意，对于商业级Spartan-6，最高结温为85摄氏度，以便成功运行。
125℃的结温指定是器件不损坏的最大绝对值。
因此，请确保您的卡温度较低，以确保FPGA和电容器的正常运行。设计中的功率降低技术和适当的冷却机制可以帮助实现这一目标。
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以下为原文

FYI: In your initial post you mentioned that "my card may get +93 celzius". Please note that for commercial grade Spartan-6 the maximum junction temperature is 85 degree C for successfull functioning. The 125 degree C junction temperature specification is maximum absolute value for device not to damage. So make sure that your card also get lesser temperature to ensure proper operation of FPGA and capacitors.The power reduction techniques in design and proper cooling mechanism can help for that. 
 
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