I2C SLAVE怎么使用MSSP识别启动/停止/重启

请容忍我。我是新的I2C，在PIC16F1936（增强的中程）上实现。我有一个尴尬的问题。我已经能够使用主模式从EEPROM写入和接收。我在使用从模式时遇到了问题。我的问题是，在读取设备时，我似乎不知道如何识别重启条件？（或者开始或停止，1）。我知道在哪里可以设置SSPCON1，(3-0)SSPM位到b'1110'，以便启用具有启动和停止中断的7位从模式。我知道在哪里可以设置SSPCON3、PCIE和SSCIE位，以便分别启用开始位中断和停止位中断。我看到SSPSTAT、P和SSPSTAT的S位反映了已经接收到的最后一位（开始或停止）的当前状态。（我有点困惑，为什么有aP和S位，因为它们看起来是彼此相反的，很容易一个或者另一个就足够了？）4。在数据表中说，在启动条件下，设置SSPIF标志。但是…设置SSPIF标志…对于所有的事情，如果有这样的事情，决定什么是SPIF标志？开始条件与停止条件VS第八时钟信号的下降沿与时钟信号的第九下降沿…我特别关注第259页的数据表的图24-17。这显示了信号…除了使用一些已保存的变量作为代码指针，并希望它开始时正确，并且永远不会搞砸之外，我看不出任何逻辑方法来确定这一点？我知道如果我启用AHEN和DHEN，AktiM位将告诉我SSPIF中断是否是由于第八下降沿与第九下降沿。但我看不到停止与开始位的区别在于其他SSPIF中断。如果每个都有一个中断标志，那就容易多了！我肯定有一些明显的东西我错过了吗？S和P比特作为标志吗？如果我自己清除S/P位，如果我这样做，它会保持畅通吗？编辑：逻辑思考这一点，我已经得出结论，P和S位必须作为中断标志？他们唯一的特殊之处是，当它们被设置时，它们会自动地相互清除。因此，当设置SSPIF标志时，我必须首先检查S，如果设置它是START，但是我必须清除它，以便知道下一个SSPIF标志是第8个下降时钟周期，而不是RESTART？为什么他们不显示软件/用户明确的S位？为什么它不叫“SCIF”呢？我想我得亲自检查一下，这已经是令人沮丧的3天了。叹息。



      以下为原文

    Please bear with me. I am new to I2C, implementing on a PIC 16F1936 (enhanced midrange). And I have an embarrassing problem. I have been able to use Master mode to write and receive from an EEPROM. I am having issue using Slave mode.

The crux of my problem is that during a read of the device, I can't seem to figure out how to recognize a restart condition?? (Or a start or stop, for that matter).

1. I see where I can set up SSPCON1,(3-0) SSPM bits to b'1110', in order to enable 7 bit slave mode with start and stop interrupts.

2. I see where I can set SSPCON3,PCIE  and SSPCON3,SCIE bits in order to enable start bit interrupt and stop bit interrupt respectively.

3. I see where SSPSTAT,P and SSPSTAT,S bits reflect the current state of last bit (start or stop) that has been received. (Which I am a little confused why there is a P and an S bit, since they seem to be the inverse of each other, and easily one or the other would suffice?)

4. In the datasheet is says that on a start condition, SSPIF flag is set. But... the SSPIF flag is set... for everything.

What would be the conventional way, if there is such a thing, to determine what set the SSPIF flag? Start condition vs a stop condition vs the 8th falling edge of the clock signal vs the 9th falling edge of the clock signal...? I'm looking in particular at figure 24-17 of the datasheet on page 259. This shows the signals... And I see no logical way to determine this, other than using some saved variable as a code pointer and hoping it starts out correct and never gets messed up?

I see where if I enable AHEN and DHEN, ACKTIM bit will tell me if SSPIF interrupt is due to 8th falling edge vs 9th falling edge. But I do not see where the stop vs start bits are differentiated from other SSPIF interrupts. It would be much easier if there was an interrupt flag for each!

I am sure there is some obvious thing I am missing?
Do the S and P bits act as flags? If I clear the S/P bit myself will it stay cleared, if I do this?


Edit: Logically thinking this thru, I have come to conclusion that P and S bits must act as interrupt flags? And the only thing special about them is that they automatically clear each other when they are set? So when SSPIF flag is set, I must first check S, if set it is a START, but I must clear it in order to know that the next SSPIF flag is the 8th falling clock cycle and not a RESTART? Why they do not show software/user clear of the S bit? And why is it not called "SCIF"? I suppose I have to check this for myself, and it has been a frustrating 3 days, already.. sigh.