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嗨,所有。我正在做项目,我需要连接MICVLE与ETH交换机89E6122连接PIC32 MX675 F512H。我使用MPLAB-X和V2Y0B。交换机有自己的可管理软件,我从PIC通过MIDO总线驱动。这个交换机API工作正常,我得到正确的状态,链接到他们。通过MII接口与PIC相连,工作在PHY模式下的CPU端口(它为两端MAC和PY产生25M时钟)处于100M全双工模式。分组从PIC接收并在网络中传输没有问题,但是在PIC RX中,所有分组都作为溢出分组市场,因此不适用于TCP IP堆栈。这种行为的原因是什么?是PIC MAC接口初始化中遗漏的东西吗?我被迫“伪造”了MAC驱动程序中链路的状态,使以太网栈正常运行,因此一些检查PHY能力和协商结果的功能返回了连接经典PHY时预期的数据。我选择了SMSCLAN9303驱动程序。我附上了寄存器转储和示意图,非常感谢大家的帮助。
以上来自于百度翻译 以下为原文 Hi all. I am working on project where I need to connect PIC32MX675F512H with eth switch 88E6122 from Marvel. I used Mplab-X with HARMony v2_00b. The switch has own manageable software, which I drive thru MDIO bus from PIC. This switch API is working fine and I get correct status for link which are connected to them. The CPU port which is connected to PIC with MII interface and it works in PHY mode (It generates 25M clocks for both sides MAC and PHY) is up in 100M Full Duplex mode. The packets are received from PIC and transfer in network without problems, but in PIC RX directions are all packets market as overflow packet and so aren't avalible for TCP IP stack. What could be the reason for such behavior? is it something missing in initialization of PIC MAC interface. I was forced to "fake" the status of the link in MAC driver, to bring ethernet stack as up, so some functions which checks PHY capability and negotiated results are returning data which are expected when classical PHY is connected. I chose SMSC_LAN9303 driver in Harmony. I attached register dump and schematic. Many Thanks for any help. Attached Image(s) |
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我做错了,我没有设置正确的时钟配置。我假设我们工作在80MHz,但是我们实际工作在8MHz。对于未来,我们需要仔细检查所有的时钟设置。考虑Anton。
以上来自于百度翻译 以下为原文 I did mistake and I didn’t set correct clock configuration. I assume that we are working at 80MHz but we were in reality working at 8Mhz. For the future we need to double check all clock settings. Regards Anton. |
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