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嗨,有人有工作中断代码的例子吗?PIC32 MZ2048 EFM064我正试图得到一个在RD0的崛起工作。谢谢
以上来自于百度翻译 以下为原文 Hi, Does anyone have any working interrupt code examples? PIC32MZ2048EFM064 I'm trying to get one working on the rise of RD0. Thanks |
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当将这个pin设置为输入时(即,TRISDbits.RD0=1-应该是重置值),这应该会影响IFS0 bit2(在配置的边缘发生时设置)。在中断启用之前,您可能应该在初始化过程中确保某个点,从而清除此位。这个IFS0位2应该设置,无论ISR是否启用,当边缘被强加在RD0引脚上。在调用ISR之前,先通过调试来验证这一点。如果你在过渡发生时得到IFS0位2,你就只有一半了。接下来要确保设置了IEC0位2,在IPC0寄存器中设置了优先级(参见数据表中的位字段范围,而不是第7节中的FRM),然后创建在中断向量表中寻址的处理程序(通常通过告诉XC32编译器的函数原型来完成是ISR——参见编译器手册)。如果您的IFS0位2在没有ISR功能的情况下进行设置,那么在开始启用中断并按照我的建议进行配置时,您应该具有ISR功能。当然,不要忘记为触发触发事件的边缘配置ITCCON…
以上来自于百度翻译 以下为原文 When you set this pin up as input (i.e. TRISDbits.RD0 = 1 - should be reset value), this should affect the IFS0 bit2 (set when configured edge occurs). You should probably insure as some point during initialization BEFORE interrupts are enabled that this bit is cleared. This IFS0 bit 2 should set regardless if the ISR is enabled or not when an edge is imposed on the RD0 pin. Verify this occurs via debugging first before seeing if the ISR is called. If you are getting the IFS0 bit 2 set when transition occurs, you are half way there. The next thing is to insure that the IEC0 bit 2 is set, the priority is set in IPC0 register (see bit field range in datasheet - not FRM - in section 7), then create a handler that is addressed in the interrupt vector table (usually accomplished with function prototype that tells XC32 compiler this is an ISR - see compiler manual). If your IFS0 bit 2 is setting without the ISR functionality, you should have the ISR function as intended when you start to enable interrupts and configure as I suggested. Of course, do not forget to configure INTCON for the edge you want to trigger transition event... |
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