引导块EEPROM访问

将用于读/写的代码发布到eeprom（至少——如果可能的话，所有代码）将有助于评估问题。



      以下为原文

    Posting your code for reading/writing to the eeprom (at a minimum - all the code if possible) would help in evaluating the issues.

下面是我的读写代码。两者都在每个块中使用。编辑代码标签。此外，当我在任一块中读取时，我会写入一个本地var，例如无符号char opyMod。



      以下为原文

    Below is my read and write code.  Both are used in each block.  Edited to put the code tags in.  Also, when I read in either block I write to a local var such as unsigned char op_mode.
 
unsigned char Read_E (unsigned char location)//get a single byte from the EEPROM
{
    unsigned char value,wait=0;;
// EEADRH = 0x00;
    EEADR=location; //EEPROM address
    EECON1bits.EEPGD=0; //read from eeprom
    EECON1bits.CFGS = 0;
    EECON1bits.RD=1; //read
    wait++; // Simple delay
    value=EEDATA;
    return value;
}

void Write_E (unsigned char where, unsigned char what) //write a single byte to the EEPROM
{
    INTCONbits.GIE=0; //turn off interupts
    while (EECON1bits.WR==1) {} //wait for ok to write
    EECON1bits.WRERR = 0;
// EEADRH = 0x00;
    EEADR=where; //specify address
    EEDATA=what; //pass data to be stored
    EECON1bits.EEPGD=0; //select EEPORM
    EECON1bits.CFGS = 0;
    EECON1bits.WREN=1; //enable the write

    EECON2=0x55; //special procedures...
    EECON2=0xAA; //..to confirm write
    EECON1bits.WR=1; //start the write
    while (EECON1bits.WR==1) {}//wait for write to finish
    INTCONbits.GIE=1; //turn on interupts again
    EECON1bits.WREN=0; //prevent another write
}

FY:代码标签使用[]不&字符。



      以下为原文

    FYI: code tags use [ ] not < > characters.

以及配置位。



      以下为原文

    And the configuration bits.

      以下为原文

    // PIC18F45K20 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1H
#pragma config FOSC = INTIO67 // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 18 // Brown Out Reset Voltage bits (VBOR set to 1.8 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTBE // CCP2 MUX bit (CCP2 input/output is multiplexed with RB3)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config HFOFST = ON // HFINTOSC Fast Start-up (HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include

让我们来看看我是否有正确的问题：如果从引导块写入eeprom，那么它将从引导块中正确地读回。如果从主块写入EEPROM，则它从主块正确读取。如果从主块和引导块中写入红色，则读取全部零。对吗？重启后，启动块内的读回工作吗？



      以下为原文

    Let's see if I have the problem right:
If you write to eeprom from the boot block it reads back correctly from within the boot block. If you write to eeprom from the main block it reads back correctly from the main block. If you write from main block and red from boot block it reads all zeros. Is that correct? Does the read back work within the boot block after a power-on reset?

如果我从引导块写入EEPROM，从引导块读取所有的工作都是正确的。如果我在主块中做同样的工作，所有的工作都是正确的。如果我在主块中向EEPROM地址0x24写入0x03的值，则重置芯片，并从我读取的0xFF的引导块读取地址0x24。我预计0x03。



      以下为原文

    If I write to EEPROM from the boot block and read from the boot block all works correctly.  If I do the same in the main block all works correctly.  If I write to the EEPROM address 0x24 a value of 0x03 in the main block, reset the chip, and read address 0x24 from the boot block I read 0xFF.  I expect 0x03.

所以从引导块写入，重置芯片，从引导块读取可以吗？



      以下为原文

    So writing from boot block, resetting the chip, reading from boot block is OK?

对。这是意料之中的事。



      以下为原文

    Yes.  That works as expected.

我发现其他微芯片项目，比如设置引导标志的PIC2版本的引导加载程序：但是，XC8似乎并不喜欢这个。有XC8版本保留内存位置吗？



      以下为原文

    I have found other Microchip projects such as the PIC2 version of the bootloader that sets a boot flag like: 

//#pragma romdata _bootcode = 0x7FFE
//rom word bootcode = 0x5555;

However, XC8 does not seem to like this.  Is there an XC8 version of reserving a memory location?

问题解决了，但我不确定为什么100%。在写入EEPROM和ReSET（）之间，在主块中添加了一个延迟。在引导块中读取EEPROM之前，我还添加了一个延迟。现在，我能够写一个值EEPROM地址0x24，重置芯片，并读取EEPROM值写。让我感到困惑的是，我一直试图通过删除延迟来重现错误，但是现在它也没有延迟了。我也尝试过干净的建筑。我把耽搁推迟了，以防万一。如果我找到其他相关信息，我会更新这个帖子。谢谢！



      以下为原文

    The problem is resolved but I am not 100% sure why.  I added a delay in the main block between writing to EEPROM and Reset().  I also added a delay before reading EEPROM in the boot block.  Now I am able to write a value to EEPROM address 0x24, reset the chip, and read the EEPROM value that was written.  What has me confused is, I have been trying to reproduce the error by removing the delays but now it works without the delays as well.  I have tried with clean builds as well.  I put the delays back in as a precaution.  I'll update this thread if I find any other pertinent information.
 
Thank you!

如果你想在Flash ROM中设置一个常数，那么限定符COSTO会这样做，例如：



      以下为原文

   
IF you are asking about setting a constant in flash ROM then the qualifier const will do that,example:
const char store_in_ROM = 0x24 ;
 

我需要能够根据条件设置这个值。我不能那样做。



      以下为原文

    I need to be able to set that value based on conditions.  I could not do that with a const.

好，不过这似乎是您要讨论的示例正在做的事情。如果成功地向eeprom写入，则应该可以从代码的任何部分读取，而不管从哪个“块”执行读取。可能没关系，但这不是必需的：（这个位由硬件设置/清除-这是一个错误指示符)这个位应该在写序列之后/在读序列之前进行检查，以便绝对地确定在上次写时没有错误。



      以下为原文

    OK, however that appears to be what the example you asked about was doing.
If you successfully write to the eeprom it should be readable from ANY part of your code, regardless from which "block" the read is executed. 
Might not matter but this is not needed: (this bit is set/cleared by the hardware - it is an error indicator)
EECON1bits.WRERR = 0;
This bit should be checked after the write sequence/ before a read sequence to be absolutely sure there was not an error on the last write.
 

非常感谢你。这是旧代码，我独自离开，但我会做出调整。



      以下为原文

    Thank you very much.  This is old code I was leaving alone but I will make that adjustment.
 
 

在重新设置之前，你检查一下写是否完成了？它可能需要几毫秒。



      以下为原文

   
Are you check to see if the write is finished before you reset?  It can take a few milliseconds.

OP检查写入函数结束时的WR位并等待它清除。（参见POST第3代码）。



      以下为原文

    OP checks the WR bit at the end of the write function and waits for it to clear. (see post#3 code).

在两个地方？这就是程序中的确切代码。



      以下为原文

   
In Both Places?
And is that the Exact code in the program.

是的，这是程序中的确切代码。当我调用WrreEdE函数时，当它返回时，我立即调用REST（）。我在写和重置之间添加了一个_u._ms(50)，认为需要延迟以确保写完成。虽然我没想到它会在写完之前返回，但是时间延迟似乎确实有帮助。



      以下为原文

    Yes that is the exact code in the program. 
 
When I call the Write_E function I immediately the Reset() when it returns.  I added a __delay_ms(50) in between the write and reset thinking the delay was needed to ensure the write had completed.  Though I would not have expected it to have returned from the write without completing but the time delay does seem to have helped.
 
    Write_E(OP_MODE,OP_MODE_UPGRADE);
    __delay_ms(50);
    if(rssi>0x02){
        //Reset so the bootloader will begin the upgrade.
        Reset();
    }