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我刚刚写了一个模块,通过Spartan 3E开发板上的SMA连接器测试外部时钟。 这是代码: 图书馆; 使用ieee.std_logic_1164.all; 使用ieee.numeric_std.all; 图书馆unisim; 使用unisim.vcomponents.all; 实体test_dcm是 港口( clk_in:在std_logic中; rst_in:在std_logic中; testpoint_out:输出std_logic ); 最终实体; test_dcm的架构行为是 组件BUFGP是 port(I:in std_logic; O:out std_logic); 最终组件; 组件IBUF是 port(I:in std_logic; O:out std_logic); 最终组件; 组件OBUF是 port(I:in std_logic; O:out std_logic); 最终组件; signal clk:std_logic; 信号测试点:std_logic; 信号rst:std_logic; 开始 clk_buf:BUFGP端口映射 (I => clk_in, O => clk); test_obuf:OBUF端口映射 (I =>测试点, O => testpoint_out); rst_ibuf:IBUF端口映射 (I => rst_in, O => rst); 过程(clk,rst) 开始 如果rst ='1'那么 测试点 这是关联的约束文件。 NET“clk_in”PERIOD = 61.1ns HIGH 50%; # NET“clk_in”LOC =“A10”| IOSTANDARD = LVTTL | CLOCK_DEDICATED_ROUTE = TRUE; # NET“rst_in”LOC =“K17”| IOSTANDARD = LVTTL | 拉下; # NET“testpoint_out”LOC =“A6”| IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8; 外部时钟是16.3676 MHz的TCXO。 当我对测试引脚进行调整时,我期望看到的是稍微延迟(相对于我触发的TCXO信号)TCXO频率的一半的方波信号。 然而,我实际看到的是加上闪烁的180度移位版本。 谁能解释为什么会这样? 我也试过让OBUF的输入为clk,这给了我预期的结果 - 相同频率的稍微延迟的信号。 谢谢, 科林 以上来自于谷歌翻译 以下为原文 Hello, I just wrote a module to test an external clock via the SMA connector on the Spartan 3E dev board. Here is the code: library ieee;use ieee.std_logic_1164.all;use ieee.numeric_std.all;library unisim;use unisim.vcomponents.all;entity test_dcm isport(clk_in : in std_logic;rst_in : in std_logic;testpoint_out : out std_logic);end entity;architecture behavioral of test_dcm is component BUFGP isport(I : in std_logic;O : out std_logic);end component;component IBUF isport(I : in std_logic;O : out std_logic);end component;component OBUF isport(I : in std_logic;O : out std_logic);end component;signal clk : std_logic;signal testpoint : std_logic;signal rst : std_logic;beginclk_buf : BUFGP port map(I => clk_in, O => clk); test_obuf : OBUF port map(I => testpoint, O => testpoint_out);rst_ibuf : IBUF port map(I => rst_in, O => rst);process (clk,rst)beginif rst = '1' thentestpoint <= '0';elsif clk'event and clk = '1' thentestpoint <= not(testpoint);end if;end process;end behavioral; Here is the associated constraint file. NET "clk_in" PERIOD = 61.1ns HIGH 50%;#NET "clk_in" LOC = "A10" | IOSTANDARD = LVTTL | CLOCK_DEDICATED_ROUTE = TRUE;#NET "rst_in" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN;#NET "testpoint_out" LOC = "A6" | IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8; The external clock is a TCXO of 16.3676 MHz. What I expect to see when I scope the test pin is a slightly delayed (relative to the TCXO signal, which I'm triggering on) square signal of half the frequency of the TCXO. What I actually see, however, is that plus a flickering 180 degree shifted version of it. Can anyone explain why this happens? I've also tried having the OBUF's input be clk, which gives me what I expected - a slightly delayed signal of the same frequency. Thanks, Colin |
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3个回答
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如果你在TCXO输出上触发,那么你就会看到我期望的结果。
触发周期和触发周期之间无法保证相位关系 您的测试点的当前状态。 如果你在测试点上触发而不是你 应该有一个稳定的痕迹。 问候, 的Gabor - Gabor 以上来自于谷歌翻译 以下为原文 If you trigger on the TCXO output, then you're seeing exactly what I would expect. There is no guarantee of phase relationship between the trigger cycle and the current state of your testpoint. If you trigger on the testpoint instead you should have a stable trace. regards, gabor -- Gabor |
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嗯...有趣。
当我在测试点上触发时,两条迹线都是稳定的。 你能更深入地解释为什么会这样吗? 当然,两个信号之间可能无法保证相位关系,但看起来8 MHz信号的相位必须不断变化,但是触发它似乎与此相矛盾,因为在这种情况下两个信号是稳定的。 以上来自于谷歌翻译 以下为原文 Hmm...interesting. When I trigger on the testpoint both traces are stable. Could you explain a little more in depth why this is? Sure, the phase relationship may not be guaranteed between the two signals, but it appears the phase of the 8 MHz signal must constantly be changing, however triggering on it seems to contradict this because the two signals are stable in this case. |
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啊,我知道为什么会这样。
如果在16 MHz信号的每个上升沿触发,则在16 MHz信号的一个周期内,只能看到8 MHz信号的一半。 因此,在16 MHz信号的每个上升沿,您将看到8 MHz信号偏移一半或180度。 以上来自于谷歌翻译 以下为原文 Ah, I know why this is. If you trigger on every rising edge of the 16 MHz signal, you have, in one period of the 16 MHz signal, seen only half of the 8 MHz signal go by. Therefore on each rising edge of the 16 MHz signal you'll see the 8 MHz signal shift by half, or 180 degrees. |
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