如何为Spartan XL创建HDL格式的设计

嗨，
你可以尝试一件事。
一些（较旧的）书籍带有学生版ISE4.2。
也许（运气好的话）他们还提供HDL综合所需的第三方综合工具，就像完整版本一样。
（那是Synopsys FPGA编译器，在过去）。
你需要为这样一个过时的设备设计什么样的命运？
是打算改进旧设计并将其重新加载到旧板上，还是旧设计应该在更实际的设备中运行？
在后一种情况下，您不需要旧工具。
原理图纸是基于或已在您的计算机上可用。
（哪种格式？EDIF，ECS-Schematic ......？）
有一个很好的综合 
Eilert



以下为原文

Hi,
there may be one thing you can try.
Some (older) books came with a student version of ISE4.2.
Maybe (with some luck) they also provide the third party synthesis tools required for HDL synthesis, like the full versions did. (That was Synopsys FPGA Compiler, in the old days).
 
What bad fate makes you need to design for such an outdated device?
 
Is the intention to improve the old design and reload it into the old board, or shall the old design run in a more actual device?
In the later case you don't need the old tools.
 
Are the schematics paper based, or already available on your computer. (Which format? EDIF, ECS-Schematic...?)
 
 
Have a nice synthesis
  Eilert
 
 

eilert写道：
你需要为这样一个过时的设备设计什么样的命运？
开玩笑吧！
我试图这样做的问题是不支持工具或芯片。
另外，我想知道“经典”复古工具（包括Synopsys工具和IMPACT）是否可以在现代操作系统上运行。
如果这是一次学习/培训练习，我建议您定位S3设备。
有来自第三方的便宜的演示/评估S3板，你可以在许多当前的操作系统平台上获得webpack（包括IMPACT，synth，sim）的支持。
如果这是一个改造 - 不再生产的产品的逆向工程工作，那么方便的方法是简单地使用原始工具和设计数据库（它们被存档，对吧？）。
同样，您可能必须找到要安装和运行工具的Win95机器。
如果变化适度，那么将设​​计转换（原理图到HDL）添加到项目中比在原理图中保留更多的工作和风险更大。
首先，原理图比HDL更容易设计评论。
还有一件事 - 如果您最终继续进行转换，您是否有选择VHDL与Verilog的自由裁量权？
如果是这样的话，你可能会转向Verilog，其他条件相同。
将来，请告诉您的同事，您的治疗师禁止您接受任何比Spartan 3更老的技术。
另一方面，如果有许多类似的古代设计需要更新，那么你将成为公司的大师，这项任务非常可恶，任何其他任何人都不会来到它附近。
对其他人挖掘类似项目的恐惧将使您立即成为公司的重要资源。
你将学到一种其他人没有或想拥有的技能，这使你不可或缺。
就业保障！
（那是一线希望！）
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

 

eilert wrote:

What bad fate makes you need to design for such an outdated device? 

 
No kidding!
 
The problem I see with trying to do this is there's no support for either the tools or the silicon.  Plus I wonder if the 'classic' vintage tools (incl the Synopsys tool, and IMPACT) would run on a modern OS.
 
If this is a learning/training exercise, I would suggest targeting an S3 device.  There are cheap demo/eval S3 boards from 3rd parties, you get support for webpack (incl IMPACT, synth, sim) on a number of current OS platforms.
 
If this is a retrofit - reverse-engineer job for a product no longer in production, then the expedient approach is to simply use the original tools and design database (they were archived, right?).  Again, you might have to find a Win95 machine on which to install and run the tools.  If the changes are modest, it's more work and more risk to add design conversion (schematic to HDL) to the project than to stay in schematics.  For one thing, schematics are a heckuva lot easier to design review than HDL.
 
And another thing -- do you have discretion for choosing VHDL vs. Verilog, if you end up going forward on the conversion?  If so, you might steer yourself toward Verilog, all else being equal.
 
In the future, tell your colleagues that your therapist has forbidden you from taking on any technology older than Spartan 3.
 
On the other hand, if there are a number of similar ancient designs in need of updates, then you will become the company guru on a task that is so odious that no-one else will come anywhere near it.  The fear that others have of dredging up a similar project will make you, instantly, a critical resource to the company.  You will have learned a skill that no-one else has or wants to have, and that makes you indispensable.  Job security!  (that's the silver lining!)
 
- Bob Elkind
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