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我有一台带有PCIe功能的Spartan-6 150T设备,我想将单通道Aurora添加到其他未使用的GTP中。 我有两个独立的100MHz低抖动时钟,其中一个用于PCIe GTP,另一个用于Aurora ...... 我的问题是:我可以将PCIe时钟用于PCIe,并将其他时钟用于所有7种Aurora实现吗? 是否有其他方案,如将PCIe时钟分配给4个GTP,另一个时钟分配给其他4个GTP? 甚至可以使用另一个GTP时钟的GTP吗? 我不认为分离跟踪并将时钟外部路由到每个GTP时钟输入是有效的。 S-6设备上的全局时钟资源可以在内部将时钟分配给其他GTP吗? 谢谢! 以上来自于谷歌翻译 以下为原文 Hi all, I have a Spartan-6 150T device with PCIe working, and I want to add single-lane Aurora to the other unused GTPs. I've got two separate 100MHz low-jitter clocks, of which one is going to the PCIe GTP, and the other is available for Aurora... My question is this: can I use the PCIe clock for PCIe, and use the other clock for all 7 Aurora implementations? Is there some other scheme, like distributing the PCIe clock to 4 GTPs, and the other clock to the other 4 GTPs? Is it even possible to use a GTP from another GTP's clock? I wouldn't think that branching off traces and routing the clock externally to every GTP clock input is valid. Can global clocking resources on the S-6 device distribute the clock to other GTPs internally? Thanks! |
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我刚回答了自己的问题。
我爱的时候会发生这样的事:笑笑: 文档 - pg。 45个UG386,S-6 GTP - 谈论用一个振荡器计时多个GTP。 振荡器原点通过使用DRP接口进行更改,并可与相邻的GTP磁贴共享。 这有点像北/南排列,所以我将能够从PCIe时钟为“北”牌(4 GTP)和从我的另一个时钟的“南”牌(也是4 GTP)计时。 如果有任何大师有什么要补充的话,我很乐意看到它,社区也会如此,但是现在我将这个标记解决了。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 I just answered my own question. I love when that happens :smileyhappy: Documentation - pg. 45 of UG386, S-6 GTPs - talks about clocking multiple GTPs with one oscillator. The oscillator origin is changed by using the DRP interface, and can be shared with a neighboring GTP tile. That's kind of like a north/south arrangement, so I'll be able to clock both "north" tiles (4 GTPs) from the PCIe clock, and "south" tiles (also 4 GTPs) from my other clock. If any gurus have something to add I'd love to see it and so would the community, but for now I'm marking this one as solved. View solution in original post |
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我刚回答了自己的问题。
我爱的时候会发生这样的事:笑笑: 文档 - pg。 45个UG386,S-6 GTP - 谈论用一个振荡器计时多个GTP。 振荡器原点通过使用DRP接口进行更改,并可与相邻的GTP磁贴共享。 这有点像北/南排列,所以我将能够从PCIe时钟为“北”牌(4 GTP)和从我的另一个时钟的“南”牌(也是4 GTP)计时。 如果有任何大师有什么要补充的话,我很乐意看到它,社区也会如此,但是现在我将这个标记解决了。 以上来自于谷歌翻译 以下为原文 I just answered my own question. I love when that happens :smileyhappy: Documentation - pg. 45 of UG386, S-6 GTPs - talks about clocking multiple GTPs with one oscillator. The oscillator origin is changed by using the DRP interface, and can be shared with a neighboring GTP tile. That's kind of like a north/south arrangement, so I'll be able to clock both "north" tiles (4 GTPs) from the PCIe clock, and "south" tiles (also 4 GTPs) from my other clock. If any gurus have something to add I'd love to see it and so would the community, but for now I'm marking this one as solved. |
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是的,两个“北”GTP_DUAL_X#Y1站点都可以从一个参考时钟输入计时,而“南”GTP_DUAL_X#Y0站点可以从第二个参考时钟输入计时。
没有任何要求使用DRP接口来实现这一点ISE软件将使用GTP向导处理正确的路由和属性设置。 ------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 Yes, both "north" GTP_DUAL_X#Y1 sites can be clocked from one reference clock input and the "south" GTP_DUAL_X#Y0 sites can be clocked from a second reference clock input. There isn't any requirement to use the DRP interface to make this happen the ISE software will handle the correct routing and attribute settings using the GTP Wizard. ------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
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