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我已经建立了两个PIC32,一个作为主人,一个作为奴隶。主机每秒发送一个命令字节,从一个字节回复一个字节。但是,主机只读取每秒字节。查看范围,每个主事务之间看起来有8个时钟周期。丢失的字节是奴隶在这些空白期间发送的字节。为什么会发生这样的事情?初始化:命令在定时器内发送。LATA是SS线,SPI接收中断。如果缓冲区未满,则中断设置为触发。
以上来自于百度翻译 以下为原文 I've set up two PIC32s, one as a master, one as a slave. The master sends a command byte once a second, and the slave replies with a series of bytes. However, the master is only reading every second byte. Looking at the scope, there looks to be 8 clock cycles between every master transaction. The bytes being lost are the ones that the slave sends during these blanks. Any ideas why this is happening? Initialization: SYSKEY=0xAA996655; SYSKEY=0x556699AA; CFGCONbits.IOLOCK = 0; //Unlock PPS SDI1R = 0b0011; //Set RB11 to SDI1 SS1R = 0b0000; //Set RA0 to SS1 RPB13R = 0b0011; //Set SDO1 to RB13 CFGCONbits.IOLOCK = 1; SYSKEY=0x0; //Lock PPS SPI1CONbits.ON = 0; //off for initialisation SPI1BRG = 3; //1MHz SPI1STATbits.SPIROV = 0; SPI1CONbits.MSTEN = 1; SPI1CONbits.FRMEN = 1; //Framed SPI SPI1CONbits.FRMSYNC = 0; //SS output - master SPI1CONbits.FRMPOL = 1; //SS active low SPI1CONbits.MSSEN = 1; //SS enable SPI1CONbits.FRMSYPW = 1; //SS one character wide SPI1CONbits.FRMCNT = 0b000; //Frame pulse counter - 1pulse per character ??????????? SPI1CONbits.MCLKSEL = 0; //Use PBCLK for Baud rate gen SPI1CONbits.SPIFE = 0; //SS precedes first bit clocked ?????? SPI1CONbits.ENHBUF = 1; //Enhanced buffer mode ?????? SPI1CONbits.SIDL = 0; //Don't stop in idle mode SPI1CONbits.DISSDO = 0; SPI1CONbits.MODE16 = 0; SPI1CONbits.MODE32 = 0; SPI1CONbits.SMP = 1; //Input data sampled at end of data output time SPI1CONbits.CKE = 0; SPI1CONbits.CKP = 1; //Clock idle high, active low SPI1CONbits.DISSDI = 0; SPI1CONbits.STXISEL = 0b00; SPI1CONbits.SRXISEL = 0b01; //Interrupt when receive buffer is not empty SPI1CON2bits.SPISGNEXT = 0; //RX FIFO not sign extended SPI1CON2bits.FRMERREN = 0; //no error interrupt for frame error SPI1CON2bits.SPIROVEN = 0; //Receive overflow does not generate error events SPI1CON2bits.SPITUREN = 0; //Transmit Underrun Does Not Generates Error Events SPI1CON2bits.IGNROV = 1; //A ROV is not a critical error; during ROV data in the fifo is not overwritten by receive data SPI1CON2bits.IGNTUR = 1; //A TUR is not a critical error and zeros are transmitted until the SPIxTXB is not empty SPI1CON2bits.AUDEN = 0; //Audio disabled IPC7bits.SPI1IP = 6; IEC1bits.SPI1TXIE = 0; IFS1bits.SPI1TXIF = 0; IEC1bits.SPI1RXIE = 1; IFS1bits.SPI1RXIF = 0; IEC1bits.SPI1EIE = 1; IFS1bits.SPI1EIF = 0; LATAbits.LATA0 = 1; SPI1CONbits.ON = 1; The command is sent inside a timer. LATA is the SS line. SPI1BUF = 0x96; LATAbits.LATA0 = 0; The SPI receive interrupt. The interrupt is set to fire if the buffer is not full. static uint8_t Counter = 0; void __ISR(_SPI_1_VECTOR, ipl6AUTO) _IntHandlerSPIInstance0(void) { if (IFS1bits.SPI1RXIF == 1) { if (Counter >= 8) { Counter = 0; LATAbits.LATA0 = 1; } else { appData.RXlist[Counter] = SPI1BUF; Counter++; SPI1BUF = 0x0F; } SPI1STATbits.SPIROV = 0; IFS1bits.SPI1RXIF = 0; } } |
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2个回答
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我正在使用的一个工作是使用非框架式通信。当主时钟发出一个信号时,从动设备才会发出信号。现在我可以看到时钟信号上的字节之间的间隙。我还是不知道为什么会有这些空白。P.S.为什么我需要手动设置和清除SS线?我预期SPI模块会控制它,但它没有。
以上来自于百度翻译 以下为原文 One work around that I'm using is to use non-framed comms. The slave will only transmitt when the master clocks out a signal. I can now see gaps between the bytes on the clock signal. I still don't know why those gaps exist. P.S. why did I need to manually set and clear the SS line? I expected the SPI module would control it, but it didn't. |
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我想你已经错过了正常的SPI是如何工作的。每个事务都是主从之间的交换。每个事务都是通过写信给主的SSPUF开始的。这导致输出8个时钟脉冲。即使你只是在读,你也必须写一些东西到SSPBUF来启动每个事务。SS只是自动的从机,它由主控手动控制。它只是由主控在“帧”模式下自动控制,这不是正常的SPI。
以上来自于百度翻译 以下为原文 I think you have missed how normal SPI works. EVERY transaction is an exchange between the Master and the Slave. EVERY transaction is initiated by writing to the Master's SSPBUF. This causes 8 clock pulses to be output. Even if you are only reading, you must write SOMETHING to SSPBUF to initiate every transaction. SS is only automatic for a slave, it 's manually controlled by a Master. It's only automatically controlled by the Master in "framed" mode, which is not normal SPI. |
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