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大家好,我的SPI通讯有点问题。当我在示波器上检查我的信号时,我没有CS,但是我可以看到我的数据和时钟。我把我的代码放在下面来理解我的问题。谢谢你,安娜。
以上来自于百度翻译 以下为原文 Hi everyone, I have some trouble with my spi communication. When i check my signals on the oscilloscope, I don't have CS but i can see my data and clock. I put my code below to understand my problem. Thank you , Anaëlle // FBS #pragma config BWRP = OFF // Boot Segment Write Protect (Disabled) #pragma config BSS = OFF // Boot segment Protect (No boot flash segment) // FGS #pragma config GWRP = OFF // General Segment Flash Write Protect (General segment may be written) #pragma config GSS0 = OFF // General Segment Code Protect (No Protection) // FOSCSEL #pragma config FNOSC = FRCDIV // Oscillator Select (8MHz FRC with Postscaler (FRCDIV)) #pragma config SOSCSRC = ANA // SOSC Source Type (Analog Mode for use with crystal) #pragma config LPRCSEL = HP // LPRC Power and Accuracy (High Power/High Accuracy) #pragma config IESO = ON // Internal External Switch Over bit (Internal External Switchover mode enabled (Two-speed Start-up enabled)) // FOSC #pragma config POSCMD = NONE // Primary Oscillator Mode (Primary oscillator disabled) #pragma config OSCIOFNC = OFF // CLKO Pin I/O Function (CLKO output signal enabled) #pragma config POSCFREQ = MS // Primary Oscillator Frequency Range (Primary Oscillator/External Clock frequency between 100kHz to 8MHz) #pragma config SOSCSEL = SOSCHP // SOSC Power Selection Configuration bits (Secondary Oscillator configured for high-power operation) #pragma config FCKSM = CSECMD // Clock Switching and Monitor Selection (Clock Switching Enabled; Fail-safe Clock Monitor Disabled) // FWDT #pragma config WDTPS = PS32768 // Watchdog Timer Postscale Select bits (1:32768) #pragma config FWPSA = PR128 // WDT Prescaler bit (WDT prescaler ratio of 1:128) #pragma config FWDTEN = OFF // Watchdog Timer Enable bits (WDT disabled in hardware; SWDTEN bit disabled) #pragma config WINDIS = OFF // Windowed Watchdog Timer Disable bit (Standard WDT selected (windowed WDT disabled)) // FPOR #pragma config BOREN = BOR3 // Brown-out Reset Enable bits (Enabled in hardware; SBOREN bit disabled) #pragma config PWRTEN = ON // Power-up Timer Enable (PWRT enabled) #pragma config I2C1SEL = PRI // Alternate I2C1 Pin Mapping bit (Default SCL1/SDA1 Pins for I2C1) #pragma config BORV = V18 // Brown-out Reset Voltage bits (Brown-out Reset at 1.8V) #pragma config MCLRE = ON // MCLR Pin Enable bit (RA5 input disabled; MCLR enabled) // FICD #pragma config ICS = PGx3 // ICD Pin Placement Select (EMUC/EMUD share PGC3/PGD3) #include "p24F16KL402.h" #define SPI_MASTER 0x30 #define SPI_ENABLE 0x40 int i=4; void SPI1Init(){ SSP1CON1 = SPI_MASTER; //Select Mode SSP1STAT = SPI_ENABLE; //Enable peripheral } int writeSPI1(unsigned char i) { SPI1BUF =i; //write to buffer for TX while (!SSP1STATbits.BF); //wait for transfer to complete return SPI1BUF; //read the received value } int main(void) { SPI1Init(); while(1) { writeSPI1(i); } } |
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19个回答
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嗯,你到底想问什么?你必须手动“移动”CS(在你选择的PIN)- SPI模块不会处理它为你…
以上来自于百度翻译 以下为原文 Mmmm, what are you asking exactly? You have to "move" CS manually (on a pin of your choice) - SPI module won't handle it for you... |
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谢谢CimZiAG:)我只想测试简单的SPI通信,然后传送2个PICSIN SPI。如果我启用了所有SPI PIN(SCKX,SDOx,SDIX和SSX),我不明白为什么我手动移动CS。但是当我写我的数据和CS信号时,我尝试手动放置CS。
以上来自于百度翻译 以下为原文 Thank Cinziag :) I just want to test simple spi communication then communicate 2 PICs in SPI. If i enable all SPI pin(SCKx, SDOx, SDIx and SSx), I don't understand why i move CS manually. But i try to put CS manually when i write my data and Cs signal is shifted. |
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SS是由从属设备中的硬件来处理的,但是在主机侧的CS必须手动驱动。现在不是一个大问题,如果你的数据被转移,你可能会有一个SPI模式的问题-时钟和数据阶段…
以上来自于百度翻译 以下为原文 The SS is handled by the hardware in the slave device, but the CS at Master's side has to be driven manually. Not a big problem anyway Now, if your data is shifted, you may have a SPI mode issue - clock and data phases... |
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如何转移?如果你声明它,发送第一个字节,在字节开始发送之前它必须变低。如果它在你的上一个字节完成发送之前就变高了,那意味着你在等待它结束之前就不必等待传输。你上面发布的代码看起来正确地等待着。请张贴你的新代码,更清楚地描述这个“转变”是什么。
以上来自于百度翻译 以下为原文 Shifted how? If you assert it, send send the first byte, it MUST go low before the byte starts sending. If it goes high before your last byte has finished sending, that means you are not waiting for the transfer to finish before de-asserting it. The code you posted above does appear to wait correctly. Please post your new code, and describe more clearly what this "shift" is. |
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http://Delo.谷歌?com /…NODE3/VIEW?USP=Schayas as cas,我们有绿色的SCK,蓝色的CS和黄色的数据。正常的,CS必须与SCK相同的级别。我改变了我的代码:空SPI1INITE(){SSP1CON1= SPIGHOME;//选择MODESSP1STAT= SPILIN;//启用外围端口BUBBITS。RB15=1;}int写SIP1(unChar Car I){PrBBIT。RB15=0;SPI1BUF=I;/ /写入TXTH缓冲区(!)SSP1STATBITS.BF);/ /等待传输完成PbBBITS。RB15=1;返回SPI1BUF;/ /读取接收值}您认为如何?
以上来自于百度翻译 以下为原文 https://drive.google.com/...NOEd3/view?usp=sharing As you cas see, We have SCK in Green , CS in blue and data in yellow. Normaly, CS must be at the same level as SCK. I changed my code : void SPI1Init(){ SSP1CON1 = SPI_MASTER; //Select Mode SSP1STAT = SPI_ENABLE; //Enable peripheral PORTBbits.RB15=1; } int writeSPI1(unsigned char i) { PORTBbits.RB15=0; SPI1BUF =i; //write to buffer for TX while (!SSP1STATbits.BF); //wait for transfer to complete PORTBbits.RB15=1; return SPI1BUF; //read the received value } What do you think ? |
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嗯?谁说的?为了避免其他问题,将“PurbButs.RB15”和“LATB15”都发生更改,除此之外,时序看起来很好。
以上来自于百度翻译 以下为原文 Huh? Says who? To avoid other problems, change both occurrences of "PORTBbits.RB15" to "LATBbits.LATB15" Apart from that, the timing looks fine. |
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非常感谢,最好是:你能帮助MeloputMySPI从从属模式吗?我不知道该怎么做…我想我需要改变:SSP1CON1.SSPM=0100=& gt;SPI从属模式,时钟=SCKX PIN,SSX PIN控制被启用,定义SPIX从属0x34空隙SPI1IN(){SSP1CON1= SPIX从属;//选择MODESSP1STAT=SPILIN;//启用外围设备},并且在我不知道…如果我需要创建一个中断或使用标志
以上来自于百度翻译 以下为原文 Thank a lot, it's better :) Can you help me to put my SPI in Slave mode ? I don't know how to do .. I think i need to change : SSP1CON1.SSPM= 0100 =>SPI Slave mode, clock = SCKx pin, SSx pin control is enabled #define SPI_SLAVE 0x34 void SPI1Init(){ SSP1CON1 = SPI_SLAVE; //Select Mode SSP1STAT = SPI_ENABLE; //Enable peripheral } And after i don't know .. if i need to create an interrupt or use flags |
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你需要设置适当的TIS位来制作CS和CLK输入。没关系。你可以这样做。
以上来自于百度翻译 以下为原文 You need to set the appropriate TRIS bits to make CS and CLK inputs. It doesn't matter. You can do it either way. |
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好吧,你知道如果我能同时在MPLAB ID3 V3 55上拥有两个DEGUG吗?我认为这是可能的,窗口&调试;gt;会话,你可以看到你的多个项目。所以我的SPI通信不起作用,你可以看到我的奴隶/主代码:主代码:从属代码:
以上来自于百度翻译 以下为原文 Alright, You know if i can have Two Degug on MPLAB IDE v3,55 at the same time ? I think it's possible, Window>Debugging>Session and you can see your multiple projects. So my SPI communication doesn't work, you can see my slave/master code : Master code : #define SPI_MASTER 0xFE//0xE9 //select 8 bit master mode cke=1, ckp=0 137 #define SPI_ENABLE 0x8000 //enable SPI port, clear statuts #include "p24F16KA102.h" int b=0b10101010; void SPI1Init(){ SPI1CON1 = SPI_MASTER; //Select Mode SPI1CON2=0xA000; SPI1STAT = SPI_ENABLE; //Enable peripheral } //unsigned char writeSPI1(unsigned char i){ unsigned char write_read_SPI1(unsigned char i) { unsigned char slave_data; SPI1BUF =i; //write to buffer for TX while (!SPI1STATbits.SPITBF); //wait for transfer to complete slave_data=SPI1BUF; return slave_data; //read the received value } int main(void) { // set Chip Select signal of the port expander TRISAbits.TRISA6 = 0 ; LATAbits.LATA6 = 1 ; // Setup PortA IOs as digital AD1PCFG = 0xFFFF ; SPI1Init(); while(1){ write_read_SPI1(b); } } Slave code : #include "p24F16KL402.h" #define SPI_ENABLE 0x40 #define SPI_SLAVE 0x34 void SPI1Init(){ TRISBbits.TRISB15 = 0; // RC6/SS - Output (Chip Select) TRISBbits.TRISB13= 0; // RC7/SDO - Output (Serial Data Out) TRISBbits.TRISB10= 1; // RB4/SDI - Input (Serial Data In) TRISBbits.TRISB11= 0; // RB6/SCK - Output (Clock) IFS1bits.SSP1IF ='0'; //Clear interrupt flag IFS1bits.SSP1IF ='1'; //Enable interrupt SSP1CON1 = SPI_SLAVE; //Select Mode SSP1STAT = SPI_ENABLE; //Enable peripheral } char getch(){ while(!IFS1bits.SSP1IF)continue; return SPI1BUF; } void putch(char byte){ while(!IFS1bits.SSP1IF)continue; SPI1BUF=byte; } int main(void) { TRISB = 0x00; SPI1Init(); while(1) { /if(getch()==1){ putch(e); } } } |
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这些都是非常错误的
以上来自于百度翻译 以下为原文 These are very wrong IFS1bits.SSP1IF ='0'; //Clear interrupt flag IFS1bits.SSP1IF ='1'; //Enable interrupt though they might even work, depending upon the compiler... |
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嗯,应该是
以上来自于百度翻译 以下为原文 Well, it should be IFS1bits.SSP1IF =0; //Clear interrupt flag IFS1bits.SSP1IF =1; //Enable interrupt |
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谢谢,但是我在示波器上什么都没有。
以上来自于百度翻译 以下为原文 Thank :) , but i have nothing on the oscilloscope .. |
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而且,在您的从属代码中,您不能启用SPI模块,而不是将其设置为从机,而是主控器(α定义SPIX从属0x34),将SS设置为输出(应该是输入的),而不是设置寄存器SPI1CON2(虽然默认值可以是OK),请注意,这些寄存器是16位宽的。
以上来自于百度翻译 以下为原文 And, in your slave code, you're not enabling SPI module, not setting it as slave, but master (#define SPI_SLAVE 0x34), setting SS as output (should be input), not setting register SPI1CON2 (though defaults could be ok), Note that those registers are 16bits wide |
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我的从属PIC没有SPI1CON2,SSP1STAT启用SPI模块SPXCON1= SPPOV=1 =当SSPXBUF寄存器仍保留以前的数据时接收新的字节。在溢出的情况下,SSPxSR中的数据丢失。溢出只能在从模式中发生。用户必须读取SpxBuf,即使只发送数据,以避免设置溢出(必须在软件中清除)。SSPEN=1=启用串行端口,并配置SCKx、SDOx、SDIX和SSX作为串行端口PNSCKP=1=时钟空闲状态为高电平SPM=0100=SPI从属模式,时钟=SCKx pin。SSX PIN控制是可行的,我认为SPI模块的配置是可以的。在我担心我的代码不好,因为我不知道我的PutCH和GGCH函数是正确的,如果我在正确的条件下在主函数中使用它们。
以上来自于百度翻译 以下为原文 My slave pic doesn't have SPI1CON2 , SSP1STAT enable SPI module SSPxCON1 = SPPOV = 1 = A new byte is received while the SSPxBUF register is still holding the previous data. In case of overflow, the data in SSPxSR is lost. Overflow can only occur in Slave mode. The user must read the SSPxBUF, even if only transmitting data, to avoid setting overflow (must be cleared in software). SSPEN= 1 = Enables serial port and configures SCKx, SDOx, SDIx and SSx as serial port pins CKP= 1 = Idle state for clock is a high level SSPM = 0100 =SPI Slave mode, clock = SCKx pin, SSx pin control is enabled I think the configuration of spi module is ok . After I fear that my code is not good because I don't know if my putch and getch function it's right and if I use them in the right conditions in the main function. |
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正如QHB所说,你的功能看起来足够好。不过,在主板上的框架模式可能是一个问题…
以上来自于百度翻译 以下为原文 Your functions look good enough, as QHB said. Still the framed mode at the Master side can be a problem... |
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你的权利,再次感谢:现在,我有麻烦从奴隶的数据,尽管我有我的主信号。我配置我的照片这样:奴隶模式为PIC24F16KL…SSP1CONLITE。CKP=1;SSP1CONBITE。SSPM=0100;SSP1CON3BITS BOEN=0;SSP1STATBITS。SMP=0;SSP1STATBITS。CKE=1;PIC24F14KA的主模式。SPI1CON1=0x00 FEL SPI1CON2= 0xA000 SPI1STAT=0x800 0.您认为如何?
以上来自于百度翻译 以下为原文 Your right , thank again :) Now I have some trouble with data from slave despite I have my master signals. I configured my PICS like this : Slave Mode for pic24F16KL... SSP1CON1bits.CKP=1; SSP1CON1bits.SSPM=0100; SSP1CON3bits.BOEN =0; SSP1STATbits.SMP=0; SSP1STATbits.CKE=1; Master Mode for PIC24F14KA.. SPI1CON1 = 0x00FE SPI1CON2=0xA000 SPI1STAT = 0x8000 what do you think ? |
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好吧,我不确定你的奴隶照片,从来没有用过。但是,请重新检查SS的TIS设置为输入,从模式激活。
以上来自于百度翻译 以下为原文 good I am not sure about your slave PIC, never used it. but do recheck that TRIS for SS is set to input, and slave mode is active... |
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