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HIN一个带有中断嵌套的DSSPICEPXXXMC204。假设CPU在发生较低中断时正在处理更高优先级的ISR。可以堆叠多少个int？有7个优先级，这是否意味着有可能“堆叠”7个中断级别，而更高级别的中断呢？在数据表/附录中我不清楚（至少对我来说不清楚），在我读的一些论坛中，只有2个可能的中断同时使用优先级级别（7）来解决冲突。基本上我想知道DSPIC是否提供了7级嵌套中断（由PRORIRTE解决）。Y）或只有2个嵌套级别（高/低），但不同来源之间的冲突由优先级来解决。注意：我的朋友想要/需要知道这一点，但是他访问论坛的确认电子邮件花费了很长时间。所以我在他的欢呼声中写作。
以上来自于百度翻译 以下为原文 Hi in a dsPIC33EPXXXMC204 with interrupt nesting enabled. Suppose the CPU is processing an higher priority ISR when an lower interrupt occurs. how many levels of int can be stacked ? With 7 priority levels, does it mean there is possible to "stack" 7 levels of interrupts, with the higher interrupting the others? It's not clear in the datasheet/appnotes i read (at least not clear to me), and in some forums I read there is only 2 possible interrupts at the same time and priority level (7) are used to solve the conflict. Basically I want to know if dsPIC provide 7 levels of nested interrupts (solved by priority) or only 2 nested levels (high/low) but with conflicts between different sources solved by priority level. Note: a friend of mine wants/needs to know this but his confirmation email to access the forum is taking ages.. so i'm writing in his behalf Cheers. 
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当一个更高级别的中断被处理，一个较低优先级的中断进来时，它被忽略，直到更高级别的中断完成为止。IF标志保持设置。当较高优先级中断完成并返回时，PIC将找到下一个优先级低IF标志（如果有的话）并处理它。它会重复，直到它们都被处理。反之，低优先级中断被更高优先级的中断打断。当每一个新的中断下一个。如果他们正好击中，罐子可以堆满整个七层。
以上来自于百度翻译 以下为原文 Whe a higher level interrupt is processing and a lower priority interrupt comes in, it is ignored until the Higher level interrupt is finished. The IF flag remains set. When the higher priority interrupt is finished and returns, then the PIC will find the next lower priority IF flag (if any) and process it. It will repeat until they are all handled. Going the other way as lower priority interrupts are interrupted by higher priority ones. Those will stack as each new one interrupt the lower one. And the can stack up the Full seven levels if they hit just right. |
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我只发现了一些需要优先处理的情况，因为同一优先级的两个中断不会相互中断。只有嵌套中断时，当优先级较低的ISR运行时发生更高优先级的触发。TY被触发，MCU将按照它们在向量空间中的顺序排列它们。苏珊
以上来自于百度翻译 以下为原文 I've only found a few cases where I needed to play with the priorities because two interrupts of the same priority will not interrupt each other. The only time you get a nested interrupt is when a higher priority trigger occurs while a lower priority ISR is running. When interrupts of the same priority are triggered, the MCU will take them in the order they are listed in the vector space. Susan |
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底线，你永远不会“失去”中断，它可以只需要更长的时间来绕过服务低优先级中断。
以上来自于百度翻译 以下为原文 Bottom line, you never "lose" interrupts, it can just take longer for it to get around to servicing lower priority interrupts. |
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哦，谢谢，我不是（我的朋友）肯定如果DSPIC有7级堆叠中断（如PIC18有2）或者他误解了数据表。他肯定会感谢你的好答案。我也很感激他们，因为我从来没有用过DSPIC，知道他们很擅长打断别人是很好的。
以上来自于百度翻译 以下为原文 Oh thanks, I wasn't (well my friend) sure If dsPIC had 7 levels of stacking interrupts (as PIC18 have 2) or he misunderstood the datasheet. Surely he will appreciate your nice answers. I also appreciate them because I never used dsPIC and it's good to know they are so capable with interrupts.Smile: |
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