请问在for循环中写入的语句是顺序执行的吗？

对不起它“同时或顺序”......



以下为原文

sorry its "concurrently or sequentially"......

嗨，
答案不止一个方面。
在模拟器中，循环内的语句按顺序执行，就像进程内的每个语句一样。
（请注意，您还有for..generate“循环”，用于实例化并发代码段或模块。）
但是当涉及到合成时，这种“seqential执行”已经没有任何有用的意义了。
循环将展开为多个同时执行的逻辑函数。
这可以提供与for..generate的使用类似的结果，但通常更方便。
或者循环内部的计算会折叠成一些非常简单的硬件。
当您编写功能代码而不了解综合结果时，就会发生这种情况。
但是，循环可以帮助您使代码可伸缩和可重用，因为循环边距可以由泛型定义。
有一个很好的综合 
Eilert



以下为原文

Hi,
the answer has more than one aspect.
In a simulator the statements inside a loop are executed sequentially, as every statement inside a process.
(Be aware that you also have for..generate "loops" that instantiate concurrent code segments or modules.)
 
But when it comes to synthesis this "seqential execution" has no useful meaning anymore.
The loop will either be unrolled into a number of logic functions that act concurrently.
This can give a similar result as the usage of for..generate but is often more convenient.
 
Or the calculation inside the loop collapses to some very simple hardware.
This can happen when you write functional code whithout having an idea about the synthesis results.
However, loops can help you to make code scalable and reusable, since the loop margins can be defined by generics.
 
Have a nice synthesis
  Eilert

关于综合/模拟的一些观点：
如果代码是可综合的，那么虽然循环将在模拟中“按顺序执行”，但在执行期间模拟时间不会提前（除了下面的最后一点），因此实际上它在时间线或波形视图上同时发生
。
如果循环内有任何事件等待，它将无法合成，在这种情况下，模拟将显示时间线或波形视图中的顺序执行。
如果循环中存在基于时间的等待（不是事件等待），它们将被合成忽略，并且循环仍将合成，但现在模拟和合成之间将存在不匹配，因为合成将同时执行循环，而
模拟将在每次循环迭代中插入基于时间的延迟。
-  Gabor



以下为原文

Some points about synthesis/simulation:
 
If the code is synthesizable, then although the loop will "execute sequentially" in simulation, the simulation time will not advance during this execution (except see last point below), so in effect it happens concurrently as viewed on a time line or waveform view.
 
If there are any event waits inside the loop, it will not be synthesizable, and in this case the simulation will show sequential execution in a time line or waveform view.
 
If there are time-based waits inside the loop (not event waits) they will be ignored by synthesis and the loop will still synthesize, but now there will be a mismatch between simulation and synthesis as the synthesis will execute the loop concurrently, while the simulation will insert the time-based delays in each loop iteration.
-- Gabor