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我正在测试XAPP341文档的UART。 我使用波特率9600。 我使用50MHz时钟源的代码生成一个16x时钟 entity baud_rate_gen是port(CLK_in:in std_logic; CLK_out:out std_logic); end baud_rate_gen; baud_rate_gen的架构baud_rate_gen_arch是信号计数:INTEGER:= 163; --9600signal i_clock:std_logic:='1';开始Main:进程(CLK_in)开始if(CLK_in'event和CLK_in ='1')然后如果count = 1则计数i_clock else count count end if; 万一; 结束进程; CLK_out结束baud_rate_gen_arch; 然后我将我的Putty终端设置为 速度:9600 数据位:8 Sto位:1 平价:无 流量控制:无 FPGA发送一个简单的字符:S 但我收到的并不是我传送的东西。 我认为问题是在16x_clock但我找不到它。 谢谢 以上来自于谷歌翻译 以下为原文 Hi, i'm testing the UART of the XAPP341 document. I use the baud rate of 9600. I generate a 16x clock using this code from a 50MHz clock source entity baud_rate_gen is port ( CLK_in : in std_logic; CLK_out : out std_logic); end baud_rate_gen; architecture baud_rate_gen_arch of baud_rate_gen is signal count: INTEGER := 163; --9600 signal i_clock : std_logic :='1'; begin Main: process (CLK_in) begin if (CLK_in'event and CLK_in = '1') then if count = 1 then count <= 163; i_clock <= not i_clock; else count <= count - 1; end if; end if; end process; CLK_out <= i_clock; end baud_rate_gen_arch; Then i set my Putty terminal to speed: 9600 Data bits: 8 Sto bit: 1 Parity: None Flow control: None The FPGA send a simple character: S but what i receive is not waht i transmit. I think that the problem is in the 16x_clock but i can't find it. Thanks |
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5个回答
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你有示波器来查看信号吗?
应该很容易检查波特率是否错误。 如果你发送一个“U”字符,你应该得到1和0位交替,这使得范围更容易。 您在实现此功能的部分是什么,以及如何将16x时钟连接到内核? - Gabor 以上来自于谷歌翻译 以下为原文 Do you have an oscilloscope to look at the signal? It should be easy to check if the baud rate is wrong. If you send a "U" character you should get alternating 1 and 0 bits, which makes scoping even easier. What part are you implementing this in, and how did you connect the 16x clock to the core? -- Gabor |
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你模拟了设计吗?
生成一个50 MHz时钟的简单测试平台,并查看输出数据的速度。 此外,如果接收的数据速度相当接近,通过查看接收的位模式,您可以决定发送波特率。 只需记下发射和放大器。 接收位模式,看看传输速度应该是什么,以便它们以它们的方式接收。 当然,如果你有一个示波器,那么只需看一下电线就容易多了。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 以上来自于谷歌翻译 以下为原文 did you simulate the design? Generate a simple testbench with 50 MHz clock and see at what speed the output data comes out. Also if the received data is reasonably close in speed, by looking at the received bit pattern you can decide transmit baud rate. Just write down the transmit & receive bit patterns and see what the transmit speed should be for them to be received the way they are. Of course if you have a scope, it's much easier to just look at the wire.- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. |
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谢谢大家。
最后uart似乎工作但是这个XAPP的VHDL版本已满或有bug。 例如在接收器中: 如果std_logic_vector(no_bits_rcvd)=“1100”则为data_ready 以上来自于谷歌翻译 以下为原文 Thanks to all. Finally the uart seems to work but the VHDL version of this XAPP is full or bug. For example in the receiver: if std_logic_vector(no_bits_rcvd) = "1100" then data_ready <= '1' ; but no_bits_rcvd doesn't reach "1100" because in another process when it reach "1100" it is force to reset to "0000" There are also other of errors in receiver an transmitter. Thanks to XILINX for provide a code that doesn't work. |
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>>如果std_logic_vector(no_bits_rcvd)=“1100”然后>> data_ready>但是no_bits_rcvd没有达到“1100”,因为在另一个进程中当它达到“1100”时,强制重置为“0000”
我认为这是您对VHDL或同步设计的理解的一个问题。 如果另一个进程seesno_bits_rcvd达到“1100”并重置它,则意味着该时钟的所有进程将使observeno_bits_rcvd达到“1100”,并且下一个时钟周期将变为零。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 以上来自于谷歌翻译 以下为原文 >> if std_logic_vector(no_bits_rcvd) = "1100" then >> data_ready <= '1' ; >> but no_bits_rcvd doesn't reach "1100" because in another process when it reach "1100" it is force to reset to "0000" I think this is an issue with your understanding of VHDL or synchronous design in general. If another process sees no_bits_rcvd reach "1100" and reset it, it mean all processes at that clock will observe no_bits_rcvd reach "1100" and next clock cycle it will go to zero. - Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. |
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接收器的主要问题是它只采样7个数据位。
另外,clk1x在帧结束时不会回到零,因此接收器每次只能管理1个字节,并且扫描结束时不会超过1个字节。 以上来自于谷歌翻译 以下为原文 The main problem in the receiver is that it sample only 7 data bit. Plus, the clk1x doesn't go back to zero at the end of the frame so the receiver can manage only 1 byte at time and you scan't end more than 1byte. |
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