dsPIC33EP PGEC2和PGED2作为GPIO无法正常工作

到底是哪张照片？这些引脚与其他特性共享吗？*总是写入LAT，而不是端口…



      以下为原文

    Which PIC exactly?
 
Are those pins shared with other features?
 
*always* write to LAT, not PORT...

我正在使用：MPLABX V3.61，XC16，Wi7＆a；DSPIC33 EP512MC806。只需要他们驱动几个继电器。（通过电阻到NPN的基座）



      以下为原文

    I'm using:
MPLABX v3.61, XC16, Win7 & a dsPIC33EP512MC806.
 
Shared with nothing, hopefully. Just want them to drive a couple of relays.
(via a resistor to the base of an NPN)

确保：ANSELCCESS.ANSC13= 0x00；//通过模拟选择ANSECLEBIT。ANSC14＝0x00；CNECN= 0x00；/ /禁用更改通知-中断CNPUC＝0x00；/ /上拉禁用CNPUCP.CNPUC13= 0x01；/ /尝试拖拉CNPUCPITS.CNPUC14= 0x01；/ /尝试拖拉CNPDC= 0x00；//P模拟程序中的代码不允许删除。LATC/PORTC引脚设置为高和低如预期。我猜有更多的寄存器设置关于PORTC？



      以下为原文

     
Ensured that:
    ANSELCbits.ANSC13 = 0x00;   // Set as digital via analogue select
    ANSELCbits.ANSC14 = 0x00;
    CNENC = 0x00;                      // Disable change notification - interrupt
    CNPUC = 0x00;                       // Pull ups disabled
    CNPUCbits.CNPUC13 = 0x01;   // Try pull ups
    CNPUCbits.CNPUC14 = 0x01;   // Try pull ups
    CNPDC = 0x00;                         // Pull downs disabled
 
Running the code in the Simulator works. LATC/PORTC pins are set high and low as expected.
 
I'm guessing there are more registers to set regarding PORTC?
 
 
 

在将调试通道重新配置为PGEX1之后，您是否再次关闭芯片的电源？您必须这样做，否则新配置位设置将不起作用。



      以下为原文

    Have you turned the chip's power off and on again after reconfiguring the debug channel to PGEx1? You MUST have done that, otherwise the new configuration bits settings will have no effect.

它一直在PGEX1上。是的，芯片，PICTIT3和MPLABX已经被循环了。我一定错过了一些……出于兴趣。当PGEX1通过配置位选择时，PGEX2／3是否为GPIO和RP（I）引脚？



      以下为原文

   
It's always been on PGEx1.
And yes, chip, PICKIT3 and MPLABX have been cycled.
 
I must be missing something.....
 
Out of interest. When PGEx1 is selected via the Configuration Bits, are PGEx2/3 left for GPIO and RP(I) pins?
 
 

PGEX事件只在调试时起作用：对于正常操作，这些设置什么也不做，您可以正常使用PIN。



      以下为原文

   


The PGEx thing comes into play only while debugging: for normal operations, those settings do nothing and you can use the pins normally.

好的。PIN48 PGEC2/RC14/RPI62PIP47 PGED2/RC13/RPI61也可以作为I/PS恢复，我找不到任何设置它们的证据。有没有一种显示/查看所有映射/可映射引脚的简单方法？



      以下为原文

    Ok.
 
The Pins:
 
PIN48 PGEC2 / RC14 /RPI62
PIN47 PGED2 / RC13 /RPI61
 
Are also remappable as I/Ps, I can't find any evidence of them being set.
 
Is there an easy way to display/ view ALL mapped/mappable pins?
 
 

GPIO引脚48和47不能被驱动高。设备：DSPIC33 EP512MC806（带PICTIT3）只是为了澄清：MPLABX V3.61：代码中的配置BitsThen：然后使用：对端口引脚没有影响。我是否设置了错误顺序的寄存器？有没有可能将引脚映射到RPI（I/PS）？如果是这样，我如何检查和清除它？欢迎评论/问题。



      以下为原文

    GPIO pins 48 & 47 can NOT be driven high.
Device: dsPIC33EP512MC806         (with PICKIT3)
Just for clarification:
MPLABX V3.61: Configuration Bits
// FOSC
 
#pragma config POSCMD = EC              // Primary Oscillator Mode Select bits (EC (External Clock) Mode)
 
#pragma config OSCIOFNC = ON            // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
 
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
 
#pragma config FCKSM = CSECME           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are enabled)
// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

Then in code:

 
PORTCbits.RC13 = 0x00;      // Initialise - clr port
PORTCbits.RC14 = 0x00;      
 
TRISCbits.TRISC13 = 0x00;   // RELAY_17
TRISCbits.TRISC14 = 0x00;   // RELAY_14
 
ANSELCbits.ANSC13 = 0x00;   // Set as digital via analogue select
ANSELCbits.ANSC14 = 0x00;
CNENC = 0x00;                      // Disable change notification - interrupt
CNPUC = 0x00;                       // Pull ups disabled
CNPUCbits.CNPUC13 = 0x01;   // Try pull ups
CNPUCbits.CNPUC14 = 0x01;   // Try pull ups
CNPDC = 0x00;                         // Pull downs disabled
 

 
And then using:

 
LATCbits.LATC14 = 1;
LATCbits.LATC14 = 0;
 
LATCbits.LATC13 = 1;
LATCbits.LATC13 = 0;
 

Has NO effect on the PORT pins.
 
Have I set registers in the incorrect order?
 
Is it possible that the Pins have been mapped to RPI (I/Ps) somehow? If so, how can I check this and clear it?
 
Comments / questions welcome.

您好，DSPIC33 EP512MC806是一个设备在64引脚封装与许多外围设备共享引脚。在消息表8中所示的PIN定义是不完整的。在数据表中，这些PIN定义显示：PGEC2/SOSC/C3I1-/T1CK/RPI62/RC14PGED2/SCOSCI/C3I3-/RPI61/RC13，您确信次级晶体振荡器没有以任何方式启用吗？OSPCCON寄存器中LPOSECN位的值是多少？问候，Mysil



      以下为原文

    Hi,
dsPIC33EP512MC806  is a device in 64 pin package with a lot of peripherals sharing pins.
Pin definition shown in message #8 is incomplete.
 
In datasheet, these pin definitions are shown:
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
 
Are you Sure that Secondary Crystal Oscillator have not been enabled in any way?
What is the value of LPOSCEN bit in OSCCON register?
 
Regards,
   Mysil

Mysil，我运行了模拟器，发现OSCCON.LPOSCEN设置为1。但是在我的代码中找不到设置它的任何地方。我补充说：并且重新编程了设备。现在的差异（与GPIO相同的问题），除了我的手动重置不再工作。下面是编译器配置位…



      以下为原文

    Mysil,
 
I did run the simulator and found OSCCON.LPOSCEN set to 1.
But can not find anywhere in my code that sets it.
 
I added:

 
do{
        OSCCONbits.LPOSCEN = 0x00;
    }while(OSCCONbits.LPOSCEN);
 

 
And programmed the device again. There's now the difference(same problem with GPIO), other than my manual reset no longer works.
 
Below is the compiler Configure Bits...
 


// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)

// FOSCSEL
#pragma config FNOSC = PRI              // Initial Oscillator Source Selection bits (Primary Oscillator (XT, HS, EC))
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)

// FOSC
#pragma config POSCMD = EC              // Primary Oscillator Mode Select bits (EC (External Clock) Mode)
#pragma config OSCIOFNC = ON            // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECME           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are enabled)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = OFF              // Brown-out Reset (BOR) Detection Enable bit (BOR is disabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)

// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Aux Flash may be written)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)

Mysil，你是一个明星，为我指明了正确的方向。OSCON.LPASCEN一直被设置，这是GPIO问题。它被设置的原因，是因为我的锁/解锁端口映射函数中有一个“键入”。结果，映射锁从未被设置，但是没有作为一个问题被标记。然而，LPSECN是GPIO问题的根源。



      以下为原文

    Mysil,
 
You are a star, for pointing me in the right direction.
 
The OSCCON.LPOSCEN kept being set, which is the GPIO problem.
 
The reason why it was being set, was due to a "typo" in my lock/unlock Port mapping function.

void _lockMapping (void)
{
    __builtin_write_OSCCONL (OSCCON | ~(1<<6));
}
// should read:
void _lockMapping (void)
{
    __builtin_write_OSCCONL (OSCCON | (1<<6));
}
 
As a result, the mapping_lock was never set, but doesn't flag up as an issue. Yet the bit LPOSCEN was, which is the root of the GPIO problem.