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首先,目标:我想使用FPGA技术来执行实时图像处理。 到目前为止,我使用CPLD来驱动图像传感器,现在我希望转向将采用图像处理它们的FPGA。 我想全面了解在学习过程中我将面临哪些问题,以及我应该记住哪些要点,以免在此过程中遇到麻烦。 到目前为止,我提出了一些问题,但请包括我错过的其他重点。 我希望通过理由/解释得到更长的答案,因为这样的一般性问题可能对许多论坛用户有用。 1.软件:ISE WEBPack是否足以设计一个中等复杂度的图像处理器(中等复杂度听起来很模糊,所以请根据您的经验评估它,我评价为边缘检测,圆检测),或者我需要与Vivado一起使用? 有什么权衡/限制? 图像处理脚本首先不是用VHDL编写的,那么是否有工具可以使脚本进行VHDL转换? 是否有预先编写的图像处理实体,可以像matlab中使用的服务函数一样使用(例如mean.vhdl,st_deviation.vhdl)? 2. FPGA:我意识到可以尝试拟合,直到找到适合架构设计的足够大的芯片。 但是,哪些FPGA系列最适合图像处理? 同样,对于“中等复杂性”图像处理,该系列中的起始器件尺寸是多少? 我应该在尺寸,内部块,其他参数方面寻找什么特征? 我应该如何评估内部RAM,DSP片和其他未知的内部块,这对于图像处理至关重要? 3.配置内存:截至目前,我决定使用Xilinx配置内存,但一些第三方供应商也提供FPGA配置内存。 有哪些权衡,哪种更适合哪些意见? 4.外部存储器:我已经了解到DRAM与接口和访问数据相比更复杂,而不是SRAM。 然而,当需要高容量存储器时,DRAM更快并且获胜。 假如我在1024x1024 12位灰度图像上执行处理,那么内存的选择是什么(中间操作中使用的内存保留大小,类型:DRAM,SRAM,其他类型,其他建议)? 5.编程电缆:我目前使用HS2 Digilent编程电缆编程CoolRunner。 我知道它可以编程大多数Xlilnx设备,所以我想知道我应该远离哪些设备(配置内存,fpga),除非我想获得Xlinx编程电缆。 6.开发板:到目前为止,我还没有计划使用开发板。 很明显,我可以更快地启动原型设计,因为一切都已准备好插入,但是,我认为我不打算使用的其他外围设备只会增加主板的价格。 我估计用几乎任何平均尺寸的FPGA和它的外围设备制作我自己的电路板将花费我大约500-600美元,而不是花费数千美元的开发板。 有谁可以争论,并建议一个好的开发。 董事会价格合理吗? 再说一次,我不知道什么是“合理的”价格,所以请根据您的经验给它评分,比较的例子会很棒。 7.我的项目更具体:首先,我计划使用ISEWebPack和带有XCF04S配置的Spartan6XC6SLX9 FPGA。 记忆。 这种FPGA的选择基于这样一个事实,即这是家族中最大的器件,我可以将自己焊接在PCB上,尽管它是按尺寸分类的系列中最小的器件之一。 那么,正如在问题2中那样,你认为它是否足够大(在内部门,块,单元等方面)来执行前面提到的“中等复杂度”图像处理? 或者我应该考虑更大的最小容量设备? 关于我应该从什么开始的任何其他建议? 以上来自于谷歌翻译 以下为原文 It's difficult to ask a question properly, if you do not know much about the topic. First, the target: I want to use FPGA technology to perform realtime image processing. So far, I worked with CPLD to drive image sensor, and now I wish to move to FPGAs that will take upon the images to process them. I would like to get a big picture of what issues I will be facing during the learning process and which major points should I keep in mind not get into a trouble later in the process. I came up with a few questions thus far, but please include other important points that I missed. I would appreciate longer answer with justifications/explanations, since such general questions could be usefull for many forum users. 1. Software: Is ISE WEBPack suffisient enough to design a medium complexity image processor (medium complexity sounds vague, so please, rate it based on your experience, I rate it as edge detection, circle detection), or I need to go with Vivado? What are the tradeoffs/limitations? The image processing script would be first written not in VHDL, so are there tools to faciliate script to VHDL conversion? Are there prewritten entities for image processing that could be used just like service functions are used in MatLab (such as mean.vhdl, st_deviation.vhdl)? 2. FPGA: I realize that fitting could be tried untill you find a sufficiently big chip to fit the architecture design. However, which FPGA families are best for image processing? Again, for the "medium comlexity" image processing, what are the starting device sizes within the family? What characteristics I should look for in terms of size, internal blocks, other parameters? How should I evaluate internal RAM, DSP slices, and other unknown to me internal blocks that are essential for image processing? 3. Config Memory: As of right now, I decided to go with Xilinx config memory, though some third party vendors also offer FPGA configuration memory. What are the tradeoffs, which would be more suitable in which consitions? 4. External Memory: I've learned that DRAM is more complicated to interface and access the data, as opposed to SRAM. However, DRAM is faster and wins when high capacity memory is needed. Say if I was performing processing on 1024x1024 12bit grayscale images, what would be the parctial choice of memory (size with reserve for memory used in intermediate operations, types: DRAM, SRAM, other types, other suggestions)? 5. Programming Cables: I currently use HS2 Digilent programming cable to program CoolRunner. I know it can program most of Xlilnx devices, so I wish to know which devices (config. memory, fpga) I should stay away from, unless I want to get a Xlinx programming cable. 6. Development boards: So far, I am not planning on using a developnment board. It is obvious that I would have a faster start up on prototyping since everything is ready to be plugged, however, I thought that the additional peripherals that I do not plan on using would just increase the price of the board. I estimated that making my own board with almost any average size FPGA and its peripherals would cost me about $500-$600, as opposed to development boards that cost thousands of dollars. Could anyone argue on that and suggest a good dev. board with reasonable price? Again, I do not know what's "reasonable" price, so please rate it based on your experience, examples for camparison would be great. 7. More specific to my project: To start with, I plan on using ISEWebPack and Spartan6 XC6SLX9 FPGA with XCF04S config. memory. The choice of this FPGA is based on the fact that this is the biggest device in the family that I can solder myself on the PCB, although it is one of the smallest in the family by size. So, as in question 2, do you think it would be enough size (in terms of internal gates, blocks, cells, etc.) to performe earlier mentioned "medium complexity" image processing? Or should I be thinking about larger minimum capacity device? Any other suggestions on what should I start with? |
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很难正确回答这些问题。
以下几个问题可以推动您的选择/ 1.您想要处理的图像分辨率是多少? 2.什么是bpp,帧速率? 3.您需要什么样的图像处理应用程序? 你的记忆BW是什么? //如果你需要记忆 我们将VC707用于我们的应用,即UHD @ 120 Hz帧速率的实时图像处理,这个平台足以满足我们几乎所有(但不是全部)的需求。 BR 弗拉德 弗拉迪斯拉夫·穆拉文 以上来自于谷歌翻译 以下为原文 It is hard to answer these questions properly as well. A few questions like the following can drive your choices/ 1. What is the image resolution you want to process? 2. What is the bpp, the frame rate? 3. What kind of image processing application do you require? 4. What would be your memory BW? // if you would need a memory We are using VC707 for our application, which is real-time image processing of UHD @120 Hz frame rate, and this platform is sufficient to cover almost all (but not all) our needs. BR Vlad Vladislav Muravin |
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斯巴达6评估板不应该达到数千美元。
即使是Artix-7主板(带有LX100T的Nexsys 4)也仅售320美元。 LX9对于你正在尝试做的事情来说非常小,特别是如果你期望只使用Block RAM。 在推进电路板设计之前,需要考虑以下事项: 任何图像处理通常需要至少N行存储器,其中N是处理内核的高度。 线条的大小取决于输入图像的大小。 但是,假设你想要像640×480和8位像素这样的小东西。 因此,3 x 3内核需要(至少)三次640字节或大约15K位的内存。 为了简化生活,通常每条线都有一个BRAM,无论线路是否填充BRAM。 这使您能够以允许恒定(每个时钟周期)视频更新和像素读出的完整内核高度的方式管理行缓冲区。 S6 LX9限制你使用32个18Kb BRAM,听起来可能很多,但是当你的处理变得复杂时,你会很快耗尽它。 Artix-7系列在最小的设备中以100个18Kb BRAM开始,并且是新设计的更好选择,因为它得到了Vivado的支持,ISE已经达到了它的最新版本。 一些图像处理(如去隔行扫描或图像旋转)绝对需要一个完整的帧缓冲区,除非你的帧尺寸小和/或非常大(读取非常昂贵)的FPGA,否则它不适合任何FPGA中的BRAM。 在您说“等待 - 我可以在Artix-7中适合640 x 480帧”之前,还要注意连续视频处理可能需要多个帧缓冲区。 使用FPGA大小的任意限制是一个坏主意,比如“我自己可以在板上焊接的最大部分”。 像这样的零件正在成为恐龙,而且不太可能拥有足够的资源。 像Enterpoint这样的公司提供非常基本的电路板,具有相当大的FPGA和附加存储器,如果您想自己设计外设,可以在自己的平台上用作模块。 - Gabor 以上来自于谷歌翻译 以下为原文 Spartan 6 eval boards should not run into thousands of dollars. Even an Artix-7 board (Nexsys 4 with the LX100T) lists for only $320 US. The LX9 is pretty small for what you're trying to do, especially if you're expecting to use only block RAM. Here's something to consider before you move forward on a board design: Any image processing typically requires at least N lines of memory where N is the height of the processing kernel. The size of a line depends on the input image size. But let's say you wanted something small like 640 by 480 and 8 bit pixels. So a 3 x 3 kernel would require (at least) three times 640 bytes or about 15K bits of memory. To make life simpler, it usually makes sense to have a BRAM per line whether the line fills a BRAM or not. That gives you the ability to manage line buffers in a way that allows constant (every clock cycle) video update and a full kernel height of pixel readout. The S6 LX9 limits you to 32 18Kb BRAMs, which may sound like a lot, but which you will very quickly run out of when your processing gets a little more complex. The Artix-7 family starts with 100 18Kb BRAMs in the smallest device and would be a better choice for new designs, since it is supported by Vivado and ISE has reached its last release version. Some image processing (like de-interlacing or image rotation) absolutely requires a full frame buffer, which won't fit into BRAM in any FPGA unless you have a small frame size and / or a very large (read very expensive) FPGA. And before you say, "Wait - I can fit a 640 by 480 frame in an Artix-7" also note that continuous video processing can require multiple frame buffers. It's a bad idea to use an arbitrary limit of FPGA size like "the biggest part I can solder on a board myself." Parts like that are becoming dinosaurs, and not likely to have adequate resources. There are companies like Enterpoint that offer very basic boards with a reasonably large FPGA and attached memory that you can use as a module on your own platform if you want to design the peripherals yourself. -- Gabor |
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原来如此。
关于行缓冲的好处。 我想我将不得不使用一些外部存储器,因此它导致了我原来帖子中的问题#4。 什么内存是图像处理的好选择? 说问题#4的图像属性和30fps的帧速率? 以上来自于谷歌翻译 以下为原文 Oh, I see. Good point about buffers for lines. I figured that I will have to use some external memory, and thus it leads to the question #4 of my original post. What memory would be a good choice for image processing? Say with image properties from question #4 and frame rate of 30fps? |
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如果你对斯巴达6很好,我会看看各种zynq板。
你甚至可以用250美元的hdmi输出获得zynq 20板。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 以上来自于谷歌翻译 以下为原文 If you are ok with a spartan 6, I would look at various zynq boards. You can even get a zynq 20 board for $250 with hdmi output.- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. |
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naz_rb写道:
原来如此。 关于行缓冲的好处。 我想我将不得不使用一些外部存储器,因此它导致了我原来帖子中的问题#4。 什么内存是图像处理的好选择? 说问题#4的图像属性和30fps的帧速率? SDRAM是视频应用的首选内存,因为您通常不会担心存储容量,吞吐量和价格等延迟。 即使是最小的现代SDRAM芯片(DDR2或DDR3)也足以支持多帧存储。 所以真正的问题是你需要什么样的带宽。 这又取决于你需要做的处理。 例如,动态2帧平均要求您存储当前帧,读取前一帧并输出求和帧。 如果输出过程与摄像机输入不同步,则需要再进行一次帧存储和检索。 如果你全部添加它,你可能需要4倍的内存接口相机带宽。 通常我会在确定所需的内存带宽时查看峰值带宽(像素时钟乘以像素大小)。 典型视频在帧内有很多死区时间,但具有以峰值速率处理像素的带宽将减小内部缓冲区的大小。 Spartan6器件具有内置硬核存储器控制器,允许您添加单个存储器设备并获得大量带宽。 例如,以300 MHz运行的单个16位宽DDR2内存可为您提供每秒1.2千兆字节的峰值吞吐量。 这是忘记手工焊接的另一个原因。 我不认为QFP设备提供存储器接口,或者如果它们确实难以满足信号完整性要求。 - Gabor 以上来自于谷歌翻译 以下为原文 naz_rb wrote:SDRAM is the memory of choice for video applications, since you're not generally worried about latency as much as storage capacity, throughput, and price. Even the smallest modern SDRAM chips (DDR2 or DDR3) are big enough for multiple frame storage. So the real question is what bandwidth do you require. Again this depends on the processing you need to do. For example, on-the-fly 2-frame averaging requires that you store the current frame, read the previous frame, and output the summed frame. If your output process is not synchronous to the camera input, that would require one more frame storage and retrieval. If you add it all up you could require 4 times the camera bandwidth at the memory interface. Normally I'd look at peak bandwidth (pixel clock times pixel size) when determining the required memory bandwidth. Typical video has a lot of dead time within the frame, but having the bandwidth to deal with pixels at the peak rate will reduce the size of internal buffers. Spartan6 devices have built-in hard memory controllers that allow you to add a single memory device and get significant bandwidth. For example a single 16-bit-wide DDR2 memory running at 300 MHz would give you 1.2 gigabytes per second peak throughput. Here's another reason to forget the hand-soldering. I don't think the QFP devices offer memory interfaces, or if they do you'd be hard pressed to meet signal integrity requirements. -- Gabor |
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@gszakacsGabor,谢谢你的回复。
所以,它是SDRAM!虽然,我想知道以下内容:假设我的比特流足够慢,所以我可以使用SDRAM或SRAM。 在这种情况下,您是否建议使用SRAM,因为它更容易接口和访问? 此外,您在上一个答案中提到了内存接口。 它是某些FPGA的外部存储器的特殊接口吗? 一些特殊的专用针脚? 我以为我可以将外部存储器连接到我选择的任何IO引脚。 你能扩展你在内存界面上的答案吗? 以上来自于谷歌翻译 以下为原文 @gszakacs Gabor, thank you for your replies. So, SDRAM it is! Though, I wish to know the following: let's say that my bitstream is slow enough so I could use either SDRAM or SRAM. In this case, would you recommend using SRAM since it is easier to interface and access? Also, you mentioned memory interface in your previous answer. Is it a special interface for external memory that some FPGAs have? Some special dedicated pins? I thought I could hook up external memory to any IO pins of my choice. Could you expand your answer on memory interface? |
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Spartan 6系列包含MCB或内存控制器。
请参见数据手册ds160。 请注意,仅QFP封装(TQG144)中的器件不支持使用MCB。 如果不使用MCB,您仍然可以连接内存,但MIG不支持它,因此您需要自己编写接口代码。 此外,如果没有MCB,由于Spartan 6中的结构速度要慢得多,因此内存速度会受到很大影响.7系列设备可以使用结构进行内存控制,但它们没有采用QFP封装。 至于SRAM,你可以使用它,但它通常每比特的成本要高得多,除非你使用流水线同步类型,否则吞吐量也会比DDR2 SDRAM慢得多。 - Gabor 以上来自于谷歌翻译 以下为原文 The Spartan 6 series contains MCB's or Memory Controllers. See the data sheet, ds160. Note that devices in the only QFP package (TQG144) do not support use of the MCB. Without using the MCB you could still hook up memory, but MIG would not support it so you'd need to code up the interface yourself. In addition without the MCB you'd take a huge hit in the memory speed due to the much slower fabric in Spartan 6. 7-series devices can use the fabric for memory control, but they don't come in a QFP package. As for SRAM, you could use it but it generally costs a lot more per bit, and unless you use one the the pipelined synchronous types it will also be much slower in terms of throughput than DDR2 SDRAM. -- Gabor |
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@gszakas Gabor,FPGA系列选择怎么样?
据了解,家庭中的设备越大,它可以做的事情越多。 但家庭之间的区别如何呢? 他们是否制作针对特定应用进行优化的系列? 如果它们几乎相同,那么拥有不同家庭的重点是什么? 哪个系列更适合图像处理? 以上来自于谷歌翻译 以下为原文 @gszakas Gabor, How about the FPGA family choice? It's understood that the larger the device within the family, the more stuff it can do. But how about the difference between families? Do they make families that are optimized for a specific application? If they are pretty much the same, what's the point having different families? Which family would be more suited for image processing? |
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“有不同家庭的意义何在?”
关键在于每个系列都是作为使其(工艺节点)变得可用的制造技术而引入的。 您可以争辩说,当我们可以制造28纳米的Ultrascale时,没有必要继续制造0.18微米的Spartan 2,但这与消费类电子产品不同。 Xilinx的大多数客户都投入了大量的前期工程来使用现有的产品,如果Xilinx在客户产品的生命周期开始之前停止生产这些产品,那么它将会运行到另一家供应商。 通常,最新系列具有最高密度,最快速度和大多数功能。 它在引入时可能会或可能不会具有每个逻辑元素的最低价格,但在某些时候将成为迄今为止最具成本效益的家庭。 无论您是否决定采用最新系列进行新设计,都可能取决于您对Vivado等新工具的舒适度,家庭介绍价格和可用性以及您之前硬件开发的惯性。 Xilinx还有一些设备系列可以同时出现。 例如,7系列提供Artix,Kintex,Virtex和Zynq。 每个都针对不同的目标进行了优化。 Artix是最便宜的,Kintex在性价比方面有所平衡,Virtex具有严格的高性能(读取高成本),Zynq针对混合CPU / FPGA(片上系统)设计。 - Gabor 以上来自于谷歌翻译 以下为原文 "What's the point having different families?" The point is that each family is introduced as the manufacturing technology that enables it (process node) becomes available. You could argue that there's no need to keep making 0.18 micron Spartan 2 when we can have 28 nm Ultrascale, however this is not like consumer electronics. Most of Xilinx's customers have invested a lot of up front engineering to use the existing products, and would run to another vendor for I.C.'s if Xilinx stopped making those products before the life-cycle of the customer's product had run its course. In general the newest family has the highest density, fastest speed, and most features. It may or may not have the lowest price per logic element when it is introduced, but will at some time become the most cost-effective of the families up to that point. Whether or not you decide to adopt the latest family for new designs may depend on your comfort with new tools like Vivado, the family introduction price and availability, and the inertia of your own prior hardware development. Xilinx has device families that come out together as well. For example 7-series offers Artix, Kintex, Virtex, and Zynq. Each is optimised for a different target. Artix is the least expensive, Kintex is somewhat balanced for price / performance, Virtex is strictly high performance (read high cost), and Zynq targets mixed CPU / FPGA (system on chip) designs. -- Gabor |
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