PIC24FJ1024GB606 Flash编程bootloader双分区没有什么工作

有人对此有什么想法吗？



      以下为原文

    Does anyone have any thoughts on this?

好的，现在我有了一些进步，我现在可以读取和擦除内存，但仍然写不起作用，我认为可能有一个bug /问题，编译器如何解释UIT32和UTIN 32类型的定义，因为如果我使用UIT32的内存地址地址，WOR的上半部分。没有人知道为什么写的双字不工作，我已经从数据表复制了代码，所有的配置词都是根据我所看到的正确设置的。哦，我认为数据表中有一个错误，在那里它读取：-我的配置和函数：



      以下为原文

    Ok, so I'm now making a bit of progress, I can now read and erase memory but still the write does not seem to work, and I think there may be a BUG / issue with how the compiler interprets uint32 and uint32_t type defines because if I use uint32_t for memory location addresses the top half of the word is missing.
 
Does anyone have any idea why the write double word does not work I have copied the code from the datasheet, all the config words are set correctly as far as I can see.
 
Oh and I think there is an error in the datasheet where it reads :-
 

 
__builtin_tblwtl(0, progData1L);
__builtin_tblwth(0, progData2H); // Error here
__builtin_tblwtl(1, progData2L);
__builtin_tblwth(1, progData2H);
 

 
My config and functions :-
 
 
 
// FSEC
#pragma config BWRP = OFF    // Boot Segment Write-Protect bit->Boot Segment may be written
#pragma config BSS = DISABLED    // Boot Segment Code-Protect Level bits->No Protection (other than BWRP)
#pragma config BSEN = OFF    // Boot Segment Control bit->No Boot Segment
#pragma config GWRP = OFF    // General Segment Write-Protect bit->General Segment may be written
#pragma config GSS = DISABLED    // General Segment Code-Protect Level bits->No Protection (other than GWRP)
#pragma config CWRP = OFF    // Configuration Segment Write-Protect bit->Configuration Segment may be written
#pragma config CSS = DISABLED    // Configuration Segment Code-Protect Level bits->No Protection (other than CWRP)
#pragma config AIVTDIS = OFF    // Alternate Interrupt Vector Table bit->Disabled AIVT
 
// FOSCSEL
#pragma config FNOSC = FRCPLL    // Oscillator Source Selection->Fast RC Oscillator with divide-by-N with PLL module (FRCPLL)
#pragma config PLLMODE = PLL96DIV2    // PLL Mode Selection->96 MHz PLL. (8 MHz input)
#pragma config IESO = OFF    // Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
 
// FOSC
#pragma config POSCMD = NONE    // Primary Oscillator Mode Select bits->Primary Oscillator disabled
#pragma config OSCIOFCN = ON    // OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
#pragma config SOSCSEL = OFF    // SOSC Power Selection Configuration bits->Digital (SCLKI) mode
#pragma config PLLSS = PLL_FRC    // PLL Secondary Selection Configuration bit->PLL is fed by the on-chip Fast RC (FRC) oscillator
#pragma config IOL1WAY = ON    // Peripheral pin select configuration bit->Allow only one reconfiguration
#pragma config FCKSM = CSDCMD    // Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
 
// FWDT
#pragma config WDTPS = PS256    // Watchdog Timer Postscaler bits->1:256
#pragma config FWPSA = PR128    // Watchdog Timer Prescaler bit->1:128
#pragma config FWDTEN = OFF    // Watchdog Timer Enable bits->WDT and SWDTEN disabled
#pragma config WINDIS = OFF    // Watchdog Timer Window Enable bit->Watchdog Timer in Non-Window mode
#pragma config WDTWIN = WIN25    // Watchdog Timer Window Select bits->WDT Window is 25% of WDT period
#pragma config WDTCMX = WDTCLK    // WDT MUX Source Select bits->WDT clock source is determined by the WDTCLK Configuration bits
#pragma config WDTCLK = LPRC    // WDT Clock Source Select bits->WDT uses LPRC
 
// FPOR
#pragma config BOREN = ON    // Brown Out Enable bit->Brown Out Enable Bit
#pragma config LPCFG = OFF    // Low power regulator control->No Retention Sleep
#pragma config DNVPEN = ENABLE    // Downside Voltage Protection Enable bit->Downside protection enabled using ZPBOR when BOR is inactive
 
// FICD
#pragma config ICS = PGD2    // ICD Communication Channel Select bits->Communicate on PGEC2 and PGED2
#pragma config JTAGEN = OFF    // JTAG Enable bit->JTAG is disabled
//#pragma config BTSWP = OFF    // BOOTSWP Disable->BOOTSWP instruction disabled
#pragma config BTSWP = ON
 
// FDEVOPT1
#pragma config ALTCMPI = DISABLE    // Alternate Comparator Input Enable bit->C1INC, C2INC, and C3INC are on their standard pin locations
#pragma config TMPRPIN = OFF    // Tamper Pin Enable bit->TMPRN pin function is disabled
#pragma config SOSCHP = ON    // SOSC High Power Enable bit (valid only when SOSCSEL = 1->Enable SOSC high power mode (default)
#pragma config ALTVREF = ALTREFEN    // Alternate Voltage Reference Location Enable bit->VREF+ and CVREF+ on RA10, VREF- and CVREF- on RA9
 
// FBOOT
#pragma config BTMODE = DUAL    // Boot Mode Configuration bits->Device is in Single Boot (legacy) mode
 

void PROG_Erase(void)
{
    uint32 address = 0x400000;
    uint32 offset;
    
    NVMADRU = address>>16;
    NVMADR = address & 0xFFFFFF;
    NVMCON = 0x4003; // Perform Erase of a Full Page (8 rows)
    asm volatile ("disi #5");
    // Issue Unlock Sequence & Start Write Cycle
    __builtin_write_NVM();
    while(NVMCONbits.WR) ;
}

void PROG_WriteDouble(uint32 address, uint32 data1, uint32 data2)
{
    TBLPAG = 0xFA;
    
    __builtin_tblwtl(0, (data1 & 0xFFFF));
    __builtin_tblwth(0, (data1 >> 16));
    __builtin_tblwtl(1, (data2 & 0xFFFF));
    __builtin_tblwth(1, (data2 >> 16));
    
    NVMADRU = address>>16;
    NVMADR = address & 0xFFFF;
    NVMCON = 0x4001; // Perform Write of 2 words
    
    // Disable Interrupts For 5 Instructions
    asm volatile ("disi #5");
    // Issue Unlock Sequence & Start Write Cycle
    __builtin_write_NVM();
    while(NVMCONbits.WR) ;
 
 
 
void putHexLong(unsigned long i)
{
   putHex((unsigned char)(i>>24));
   putHex((unsigned char)(i>>16));
   putHex((unsigned char)(i>>8));
   putHex((unsigned char)(i&0xFF));
}
 

}

编辑：见NeXT & GT；



      以下为原文

    < edit: see next >
 

这对我（写作，GB6系列）基于…MLAIV2017Y03Y06AppsUSB设备BooTouls固件PIC24YDSPICExp16PIC24FJ1024GB610XPIM .xAppHythBooToLoad .C



      以下为原文

    This works for me (writing, GB6 family)
 
TBLPAG = 0xFA;
    
    __builtin_tblwtl(0, (data1 & 0xFFFF));
    __builtin_tblwth(1, (data1 >> 16));
    __builtin_tblwtl(2, (data2 & 0xFFFF));
    __builtin_tblwth(3, (data2 >> 16));
 
...
     asm("DISI #16");
...

 
based on
 ... mla_v2017_03_06appsu***devicebootloadersfirmwarepic24_dspicexp16_pic24fj1024gb610_pim.xapp_hid_boot_loader.c