怎么在verilog中初始化二维数组

嗨，
Verilog 2001规范的第3.10.3节（记忆）内容如下：
“n位寄存器可以在单个赋值中赋值，但完整的存储器不能。为了将值分配给存储器字，应指定索引......”
谢谢，
叶夫根



以下为原文

Hi,
 
Section 3.10.3 (Memories) of the Verilog 2001 spec reads:
 
"An n-bit reg can be assigned a value in a single assignment, but a complete memory cannot. To assign avalue to a memory word, an index shall be specified..."
 
 
Thanks,
Evgeni 

在声明数组的同一模块中，您应该使用初始块
设置数组的配置值，如：
最初开始
xyz_array [9] = 16'h1234
xyz_array [8] = 16'h4321
...
xyz_array [0] = 16h5467
结束
也可以从外部文件初始化数组，如：
initial $ readmemh（“xyz_init_vals.hex”，xyz_array）;
文件xyz_init_vals.hex包含的位置：
1234
4321
。
。
。
5467
请注意，Verilog LRM允许地址和注释，以及多个地址和注释
十六进制输入文件中每行的值，但是我发现XST的限制性要大得多。
此外，文件应该包含数量的数量，因为数组中有元素。
HTH，
的Gabor
-  Gabor



以下为原文

In the same module where the array is declared you should use an initial block to
set the config values for the array like:
 
initial begin
xyz_array[9] = 16'h1234
xyz_array[8] = 16'h4321
...
xyz_array[0] = 16h5467
end

It is also possible to initialize the array from an external file like:
 
initial $readmemh ("xyz_init_vals.hex",xyz_array);
 
where the file xyz_init_vals.hex contains:
 
1234
4321
. . .
5467
 
Note that the Verilog LRM allows addresses and comments, as well as more than one
value per line in the hex input file, however I have found that XST is much more restrictive.
Also the file should contain exactly the number of values as there are elements in the array.
 
HTH,
Gabor
-- Gabor

嗨嘉宝
我试图从包含一个十六进制的文本文件初始化一个二维数组
每行数据。
我会用基本上的初始化数据合成ROM
图像数据（十六进制）。
它是这样的：
参数pix_max = 921600;
reg [7：0] img_rom [pix_max：0];
初始 
$ readmemh（“hex.txt”，img_rom）;
应该如此，当我合成RTL时，它可以很好地处理小图像，最高可达pix_max = ~4900。
问题是当我尝试合成更大的图像时，合成过程似乎永远不会结束。
钻机包括Intel Core i3  -  2100 @ 3.10 GHz和4 GB DDR 3 RAM。
操作系统 -  32位Windows 7旗舰版。
FPGA  -  Spartan 3E 500k门。
也许，这是FPGA容量不匹配？
你认为考虑使用外部RAM来存储图像数据和实现是明智的吗？
FPGA上的RAM控制器可以转换图像像素。
你最好的看法是什么？
AJ



以下为原文

Hi Gabor
 
I am trying to initialize a two dimentional array from text file containing one hex
data per line. I would synthesize the ROM with the initialized data which is basically
image data (in hex). It goes something like this:
 
parameter pix_max = 921600;
 
reg [7:0] img_rom[pix_max:0];
 
initial
     $readmemh("hex.txt", img_rom);
 
As it should, when I synthesize the RTL it works perfect with small images, that is upto pix_max = ~4900.
Problem is when I try to synthesize larger images, the synthesis process seems to never end.
 
Rig comprises  Intel Core i3 - 2100 @ 3.10 GHz and 4 GB DDR 3 RAM. OS - 32 bit windows 7 Ultimate.
FPGA - Spartan 3E 500k gates. Perhaps, it is the FPGA capacity mismatch?
 
Do you think it would be wise to consider using an external RAM to staore the image data and implement
RAM controller on the FPGA to transrecieve the image pixels. What is you best opinion?
 
AJ
 
 

喜 
你解释我如何从外部文件或RAM中读取数据， 
我曾经运行以下代码，但它没有从外部文件中获取值 
module ipp（out，clk）;
输出[7：0];
输入clk;
参数pix_max = 16383;
reg [7：0] img_rom [pix_max：0];
initial $ readmemh（“hex.txt”，img_rom，0,16383）;
assign out = img_rom [10];
endmodule
帮我



以下为原文

hi,
            have u explain me how to read data from external file or from RAM, 
                   i used to run the following code but it does not take the valu from external file
  
     
module ipp(out,clk);
output [7:0]out;
input clk;
parameter pix_max = 16383;

reg [7:0] img_rom[pix_max:0];

initial
$readmemh("hex.txt", img_rom,0,16383);

assign out = img_rom[10];
endmodule
 help me