完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
我有一个具有简单功能的异步过程来测试收到的两个连续数据(请参阅下面的代码片段)。
当我模拟代码时,结果不像我期望的那样,即使两个数据匹配。 我无法弄清楚我的代码有什么问题。 当我使用没有锁存器的代码时,arp_ether_type信号总是设置为1(正如预期的那样),但是当我添加一个lathch时,arp_ether_type信号在字节12和13之间被重置为0 - 我不知道为什么。 知道什么可能导致这种行为吗? 函数not_arp(data&amp;冒号; STD_LOGIC_VECTOR; count:unsigned)返回std_logic是 开始 如果 (count = 12和data / = x“08”)或 (count = 13和data / = x“06”) 然后 返回'1'; 其他 返回'0'; 万一; 结束函数not_arp; 函数not_ipv4(data&amp;冒号; STD_LOGIC_VECTOR; count:unsigned)返回std_logic是 开始 如果 (count = 12和data / = x“08”)或 (count = 13和data / = x“00”) 然后 返回'1'; 其他 返回'0'; 万一; 结束函数not_ipv4; -------------------------当ETHER_TYPE => case rx_event是NO_EVENT => - (无事可做)当DATA = > - 锁定if(not_ipv4(data_in,rx_count)='1')然后ipv4_ether_type if(not_arp(data_in,rx_count)='1')然后arp_ether_type - 如果(not_ipv4(data_in,rx_count)='1'则无锁存器 )然后ipv4_ether_type if(not_arp(data_in,rx_count)='1')然后arp_ether_type如果rx_count = 13那么如果ipv4_ether_type ='1'则next_rx_state elsif arp_ether_type ='1'然后next_rx_state否则next_rx_state结束if; set_rx_state结束if; 结束案例; 以上来自于谷歌翻译 以下为原文 I have got a asynchronous process with simple function to test two sequential data received (please see the code snippet below). When i simulate the code the result is not as I was expecting, even though the two data match. I can not fint what is the problem with my code. When i use the code with no latch the arp_ether_type signal is alway set to 1 (as expected) but when i add a lathch, the arp_ether_type signal is reset to 0 between byte 12 and 13 - i dont know why. Any idea what could cause this behaveour? function not_arp(data : STD_LOGIC_VECTOR; count : unsigned) return std_logic i***eginif (count = 12 and data /= x"08") or(count = 13 and data /= x"06")thenreturn '1';elsereturn '0';end if;end function not_arp;function not_ipv4(data : STD_LOGIC_VECTOR; count : unsigned) return std_logic i***eginif (count = 12 and data /= x"08") or(count = 13 and data /= x"00")thenreturn '1';elsereturn '0';end if;end function not_ipv4; ------------------------- when ETHER_TYPE => case rx_event is when NO_EVENT => -- (nothing to do) when DATA => -- latch if ( not_ipv4(data_in,rx_count) = '1' ) then ipv4_ether_type <= '0'; else ipv4_ether_type <= ipv4_ether_type; end if; if ( not_arp(data_in,rx_count) = '1' ) then arp_ether_type <= '0'; else arp_ether_type <= arp_ether_type; end if; -- no latch if ( not_ipv4(data_in,rx_count) = '1' ) then ipv4_ether_type <= '0'; else ipv4_ether_type <='1'; end if; if ( not_arp(data_in,rx_count) = '1' ) then arp_ether_type <= '0'; else arp_ether_type <='1'; end if; if rx_count = 13 then if ipv4_ether_type = '1' then next_rx_state <= IPV4_PAYLOAD; elsif arp_ether_type = '1' then next_rx_state <= ARP_PAYLOAD; else next_rx_state <= WAIT_END; end if; set_rx_state <= '1'; end if; end case; |
|
相关推荐
7个回答
|
|
最后一个语句是set_rx_state,根据前面的代码,它可能应该是next_rx_state。
------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 The last statement says set_rx_state and it likely should be next_rx_state based on the preceding code. ------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
|
|
|
谢谢您的回复。
我不明白你的意思 - 下一个状态的代码会改变信号值吗? 即使我将“if rx_count = 13 then”更改为“if rx_count = 20 then”并延长ether_type状态 - arp_ether_type信号在12到13 tx_count转换之间变为0,我得到相同的结果。 我认为它应该保持在1,因为data_in匹配“not_arp函数”中的数据集。 以上来自于谷歌翻译 以下为原文 Thank you for your reply. I don't understand what you mean by that - that the code in next state changes the signal value? I get the same result even though i change the "if rx_count = 13 then" to "if rx_count = 20 then" and prolong the ether_type state - the arp_ether_type signal goes to 0 between the 12 to 13 tx_count transition. I think it should stay on 1 because the data_in matches the data set in "not_arp function". |
|
|
|
我误读了你的代码,请忽略我以前的帖子。
------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 I misread your code, please ignore my prior post.------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
|
|
|
在没有看到测试台的情况下,我无法知道信号输入是如何被驱动的。
但我会说案例陈述是有问题的: 当ETHER_TYPE => case rx_event是NO_EVENT => - (无事可做)当DATA => - latch if(not_ipv4(data_in,rx_count)='1')然后.... 关注的是,老实说,当NO EVENT =>以上时,我不知道VHDL在“空”情况下会做什么。 换句话说,我不知道它是否属于DATA => case(有效地对两者进行OR运算)或是否被忽略。 至少,你应该添加一个null; 当NO_EVENT =>案件处理程序时。 当然,你正在做一个可恶的双进程状态机(读:FAIL)所以所有的赌注都关闭了。 ----------------------------是的,我这样做是为了谋生。 以上来自于谷歌翻译 以下为原文 Without seeing the test bench, I can't know how the signal inputs are driven. But I will say that the case statement is problematic: when ETHER_TYPE => case rx_event is when NO_EVENT => -- (nothing to do) when DATA => -- latch if ( not_ipv4(data_in,rx_count) = '1' ) then ....The concern is that I honestly don't know what VHDL will do in the "empty" case when NO EVENT => above. In other words, I don't know whether it falls through to the when DATA => case (effectively ORing the two) or whether it's ignored. At the very least, you should add a null; to the when NO_EVENT => case handler. Of course, you're doing the hateful two-process state machine (read: FAIL) so all bets are off. ----------------------------Yes, I do this for a living. |
|
|
|
谢谢您的回复。
我添加了“null;” 对于您建议的NO_EVENT,模拟输出是相同的。 我在下面粘贴了一个测试台文件片段。 data_in和rx_count信号可以在我上面粘贴的ISim输出上看到。 - src MAC mac_rx_tdata 以上来自于谷歌翻译 以下为原文 Thank you for your reply. I added the "null;" for the NO_EVENT as you suggested, and the simulation output is the same. I pasted a test bench file snippet below. The data_in and rx_count signals can be seen on the ISim ouptput i pasted above. -- src MACmac_rx_tdata <= x"00"; wait for clk_period;mac_rx_tdata <= x"23"; wait for clk_period;mac_rx_tdata <= x"18"; wait for clk_period;mac_rx_tdata <= x"29"; wait for clk_period;mac_rx_tdata <= x"26"; wait for clk_period;mac_rx_tdata <= x"7c"; wait for clk_period;-- typemac_rx_tdata <= x"08"; wait for clk_period;mac_rx_tdata <= x"06"; wait for clk_period;-- HW typemac_rx_tdata <= x"00"; wait for clk_period;mac_rx_tdata <= x"01"; wait for clk_period;-- Protocol typemac_rx_tdata <= x"08"; wait for clk_period;mac_rx_tdata <= x"00"; wait for clk_period; |
|
|
|
我尝试了另外一件事 - 我从灵敏度列表中删除了data_in信号,现在arp_ether_type信号在12到13 tx_count转换之间保持为1。
但我不确定这是解决这个问题的正确方法,因为(据我所知),这个问题中的所有信号都应该在灵敏度列表中? 以上来自于谷歌翻译 以下为原文 I tried one more thing - i removed the data_in signal from the sensitivity list and now the the arp_ether_type signal stays at 1 between the 12 to 13 tx_count transition. But i am not sure this is the righ way to solve this, because (as far as i know) all the signals in the prosess should be in the sensitivity list? |
|
|
|
fogl写道:
我尝试了另外一件事 - 我从灵敏度列表中删除了data_in信号,现在arp_ether_type信号在12到13 tx_count转换之间保持为1。 但我不确定这是解决这个问题的正确方法,因为(据我所知),这个问题中的所有信号都应该在灵敏度列表中? 使用完全合成状态机。 一个过程。 ----------------------------是的,我这样做是为了谋生。 以上来自于谷歌翻译 以下为原文 fogl wrote:USE A FULLY SYNCRHONOUS STATE MACHINE. One process. ----------------------------Yes, I do this for a living. |
|
|
|
只有小组成员才能发言,加入小组>>
2384 浏览 7 评论
2800 浏览 4 评论
Spartan 3-AN时钟和VHDL让ISE合成时出现错误该怎么办?
2264 浏览 9 评论
3336 浏览 0 评论
如何在RTL或xilinx spartan fpga的约束文件中插入1.56ns延迟缓冲区?
2431 浏览 15 评论
有输入,但是LVDS_25的FPGA内部接收不到数据,为什么?
757浏览 1评论
请问vc707的电源线是如何连接的,我这边可能出现了缺失元件的情况导致无法供电
547浏览 1评论
求一块XILINX开发板KC705,VC707,KC105和KCU1500
369浏览 1评论
1965浏览 0评论
684浏览 0评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2024-11-25 07:30 , Processed in 1.270786 second(s), Total 60, Slave 54 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号