怎么绕过主机处理器直接用笔记本电脑连接到FPGA

如果您有任何形式的开关或跳线输入到FPGA，那么您可以在UART_RX前面放置一个MUX，以便在两个源之间进行选择。
但如果你没有这个，那么你将不得不提出一个不同的计划。
一种侵入性较小（但可能不充分）的解决方案是拥有两个不同的FPGA负载（比特流）。
它们之间唯一不同的是输入到RX_MODULE的引脚位置（当你在TX_MODULE时）;
在一次加载时，它们将连接到RX_D和TX_D，而在另一次加载时，它将是RX_I和TX_I。
然后，您可以通过下载不同的比特流（例如，使用USB编程器）在它们之间切换。
但这是一个非常慢的切换，并且会在切换期间（有效地）重置FPGA（因此我可以看到这可能不是一个充分的解决方案）。
另一种解决方案将更具“建筑性”。
（我不知道你的RX_MODULE是否仅仅是UART部分，或者RX_MODULE中是否有UART RX，所以我不知道我提出的是否在RX_MODULE的输出或其内部的某处，
UART RX将数据传递给RX_MODULE中完成的其余处理。
由于UART的工作方式，UART接收的连续字符之间可能有数千（甚至数十万）个时钟。
如果（可能是这种情况）你的UART RX通过在新字符就绪时为一个时钟断言“data_valid”信号来指示新字符的可用性，那么你可以执行以下操作......
而不是实例化一个UART RX模块，实例化两个。
将一个连接到RX_D，另一个连接到RX_I。
只要其中任何一个获得一个字符，它就会发出“data_valid”信号。
或者将两个data_valid信号放在一起，但是使用其中一个作为UART RX模块生成的字符之间的MUX选择。
通过这种方式，您可以处理来自UART接收器的字符 - 因为您一次只能使用一个，这将起作用。
Avrum



以下为原文

If you had any form of a switch or jumper input to your FPGA then you could put a MUX in front of the UART_RX to select between the two sources. But if you don't have this then you will have to come up with a different plan.
 
A less invasive (but probably not sufficient) solution would be to have two different FPGA loads (bitstreams). The only thing that would be different between them is the pin placement for the input to the RX_MODULE  (and while you are at it TX_MODULE); on one load it they would be connected to RX_D and TX_D, and on the other load it would be RX_I and TX_I. You could then switch between them by downloading the different bitstreams (say, using the USB programmer). But this is a very slow switch over and would result in (effectively) resetting your FPGA during the switchover (so I can see that this might not be a sufficient solution).
 
The other solution will be more "architectural". (I don't know if your RX_MODULE is just the UART part, or if there us a UART RX inside the RX_MODULE, so I don't know if what I am proposing goes at the output of the RX_MODULE or somewhere inside it, where the UART RX passes data to the rest of the processing done in RX_MODULE).  Because of the way that UARTs work, there are likely thousands (or even hundreds of thousands) of clocks between consecutive characters received by the UART. If (which is probably the case) your UART RX signals the availability of a new character by asserting a "data_valid" signal for one clock when a new character is ready, then you can do the following...
 
Instead of instantiating one UART RX module, instantiate two. Have one connected to RX_D and the other to RX_I. Whenever either one of them gets a character it will pulse its "data_valid". OR the two data_valid signals together, but use one of them as a MUX select between the characters generated by the UART RX modules. This way you could process characters coming from either UART receiver - since you will only use one at a time, this will work.
 
Avrum

优秀的建议！
实例化两个UART RX模块并对数据有效信号进行“或”操作并使用它来控制MUX将完成工作。



以下为原文

Excellent suggestion!  Instantiating two UART RX modules and ORing the data valid signals and using this to control a MUX will get the job done.