PIC32MZ速度慢

嗨，我读了关于PIC32速度的帖子，仍然不知道为什么我不能从中得到更多的表现。我需要发送数据/时钟信号到ADAFRUIT RGB LED显示器。我买了2个单元，把它们插在一起，形成一个32×128的显示器。我需要发送每个帧8次，一个每一个颜色位，所以我需要高数据率，我可以得到。我有一个PIC32 MZ2048 EFH144在PIC32 MZ启动器套件，我知道它运行在200兆赫。我用CKO/OSC2引脚验证了它，它在PBCLK1／2上运行。我有预取/等待状态的代码：我有这个ASM函数，它是最快的可能代码，但是它应该运行得更快：在循环中只有5个指令。拆卸与代码相同。我读到，32 MZ不能切换端口I/O任何更快，然后25Ns（感谢微芯片！MX可以在一半的时间内完成它！如果是这样的话，我在循环中写两次，那么在最坏的情况下，每条指令有5NS，它不应该超过（2×25）+（3×5）＝6NS，但它是90NS。如果有人知道为什么跑得不快，请帮助。我甚至尝试过这个函数AyyLangGraceFuffixy，但是编译器为代码编写所有的NOP（WHA）？？？）请提前帮助和感谢！



      以下为原文

    Hi,
  I've read the posts about PIC32 speed and still don't know why I'm not getting more performance out of it.  I need to send data/clock signals to an Adafruit RGB LED display.  I bought 2 units and plugged them together to form a 32 x 128 display.  I need to send each frame 8 times, one for each color bit, so I need as high data rate as I can get.  I have a PIC32MZ2048EFH144 on a PIC32MZ Starter Kit and I know it's running at 200MHz.  I've verified it with the CLKO/OSC2 pins, which runs at PBCLK1/2.  I have this code for the prefetch/wait states:

unsigned int sysclk = 200000000;
PRECONbits.PREFEN = 0b11; //enable pre-fetch for cacheable and non-cacheable regions
if(sysclk <= 40000000) PRECONbits.PFMWS = 0; // zero wait states for f<40MHz
else if(sysclk <= 80000000) PRECONbits.PFMWS = 1;
else if(sysclk <= 100000000) PRECONbits.PFMWS = 1;
else PRECONbits.PFMWS = 2;


I have this asm function that is the fastest possible code, but it should be running faster:

int writeData(FRAME_BUFFER_DATA_TYPE *data, int len)
{
/******************************************************
*
* Write pixel data to RGB LED display
*
* *data will be loaded into register a0
* len will be loaded into a1
*
* - write 1 byte of data to LATE
* bit 7 6 5 4 3 2 1 0
* color x x B2 B1 G2 G1 R2 R1
* Note: 1=rows 0-15, 2=rows 16-31
* - turn clock on (bit 7)
* - turn clock off (bit 7)
* - increment pointer for next column of data
* - repeat number of times specified by len
*
*****************************************************/
// This code combines clock/data I/O. Clock is on bit 7 since only 6 data bits are needed
_mtc0(25, 0, 18 << 5);
asm volatile (".set noreorder"); // stops optimizer messing with the following code (Important, esp. at -O1 and above)
asm volatile ("ori $t0, $0, 0x80"); // load 8 into t0 - used for LATESET & LATECLR
asm volatile ("addu $a1, $a0, $a1"); // add the pointer address to len to determine the stop point
asm volatile ("lui $v1, 0xBF86"); // load v1 with I/O port base address BF86h
asm volatile ("mtc0 $0, $25, 1"); // clear stall counter
asm volatile (".LOOP1:"); // bne (branch not equal) loops here
asm volatile ("lbu $v0, 0($a0)"); // v0 = *a0 load v0 with frame buffer byte pointed to by a0
asm volatile ("*** $v0, 0x430($v1)"); // *v1 = v0 Store frame buffer byte at LATE, BF86h base + 430h offset also turns off clock bit
asm volatile ("addiu $a0, $a0, 1"); // a0++ increment a0
asm volatile ("bne $a0, $a1, .LOOP1"); // if (a0!=a1), goto .LOOP1
asm volatile ("sw $t0, 0x438($v1)"); // RE7 on write t0 (value 8) to LATESET, BF86h base + 438h offset (branch delay slot)
asm volatile ("sw $t0, 0x434($v1)"); // RE7 off write t0 (value 8) to LATECLR, BF86h base + 438h offset so clock isn't left on
asm volatile ("mfc0 $v0, $25, 1"); // read stall counter into v0 for return value
asm volatile (".set reorder"); // re-enable optimizer
}


There are only 5 instructions in the loop.  The disassembly is identical to the code.  I read that the 32MZ can't toggle a port I/O any faster then 25nS (thanks Microchip!  The MX can do it in half the time!).  If that's the case and I'm writing twice in the loop, then at worst case, with 5nS per other instruction, it shouldn't be any more than (2 x 25) + (3 x 5) = 65nS, but it's 90nS.  If anyone knows why this isn't running any faster, please help.  I even tried making this function a __longramfunc__, but then the compiler writes all NOPs for the code (wha?!?).  Please help and thanks in advance!