怎么将VHDL生成循环索引

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问答对人有帮助，内容完整，我也想知道答案 0 嗨，我正在研究用于Xilinx FPGA设计的HDL。我遇到了一种情况，我希望将vhdl生成循环索引增加2。一个例子如下所示， LABEL：for i in 1 to CNTR_WIDTH -1 generate REG1（i）以下为原文 Hi, I am working on an HDL for an Xilinx FPGA design. I came a situation where i want to increment vhdl generate loop index by 2. An example is show below, LABEL: for i in 1 to CNTR_WIDTH -1 generate REG1(i) <= ORG_REG(i)(1 downto 0); REG1(i+1) <= ORG_REG(i)(3 downto 2); end generate; I want the generate loop i variable index proceeds like 0,2,4,6 upto the defined range.Please help me how to do this in vhdl? Regards, freak 0
2019-1-16 08:12:42　　评论淘帖0 邀请回答您可以邀请以下用户，快速回答问题 × asd008 该类别下有 32 个回答。邀请回答 aaaa321 该类别下有 27 个回答。邀请回答 doublelove 该类别下有 26 个回答。邀请回答 vynywrwr 该类别下有 21 个回答。邀请回答 hgjhgd 该类别下有 19 个回答。邀请回答 bwerwer 该类别下有 18 个回答。邀请回答 hanyan533 该类别下有 18 个回答。邀请回答 Jaionm 该类别下有 18 个回答。邀请回答 wang2222222 该类别下有 17 个回答。邀请回答 handsomelchcpp 该类别下有 17 个回答。邀请回答 binro 该类别下有 16 个回答。邀请回答 ningee 该类别下有 16 个回答。邀请回答 myf888 该类别下有 15 个回答。邀请回答 wznnzw 该类别下有 15 个回答。邀请回答 zcy615 该类别下有 14 个回答。邀请回答 wanglinhua2627 该类别下有 14 个回答。邀请回答 guotong1984 该类别下有 14 个回答。邀请回答 yhxc 该类别下有 14 个回答。邀请回答 armortech 该类别下有 14 个回答。邀请回答 60user25 该类别下有 14 个回答。邀请回答举报马祥相关推荐 • while循环中能生成捆绑数据供XY图使用吗？ 4458 • ROM MEMORY如何在生成循环中传递文件名 709 • vhdl 的 for循环问题 3974 • 索引数组问题 2949 • [已解答]什么是自动索引 2408 • While循环索引后生成的数组怎么是一样的数？ 4531 • 使用DCM怎么生成vhdl文件 1159 • 索引数组 3285 • labview将数组依次索引出来 15955 • 【求助】请问这样一个for循环的问题 890 1个回答

答案对人有帮助，有参考价值 0 您可以循环一半多次并乘以2，而不是。我就是这样做的。对于i在0到MAX / 2生成 REG1（i * 2）0生成 REG1（MAX）以下为原文 You could loop half has many times and multiply by 2, instead. That's how I would do it. for i in 0 to MAX/2 generate REG1(i2) <= even_values_signal_assignment; REG1(i2+1) <= odd_values_signal_assignment; end generate; You'll need another generate statement to handle the special case where MAX is odd. if MAX mod 2 > 0 generate REG1(MAX) <= odd_values_signal_assignment; end generate; Or, you could modify the original loop to iterate 0 to MAX/2+1 and qualify the even signal assignment with another if-generate. That way, there would be only 1 "even" equation and one "odd" equation. With the former approach, you risk modifying the odd case in the first loop and forgetting ot modify the special case following.

2019-1-16 08:22:58 评论举报陈蓓萤