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我目前使用的是DSIC33 EP256MC506,其中我配置了8个IO作为模拟输入。我有(我想我已经)配置ADC来扫描8个模拟输入和DMA来将ADC数据分流到RAM中的一个缓冲区(大小9)。我通常希望把每个模拟输入的数据放在缓冲器的每个元素中,然后在DMA产生中断时读取缓冲器。然而,DMA似乎只把数据放在前两个元素中。由MPLAB代码配置器和DMA中断服务例程生成。当我读取IAN0变量时,只有ANAN0和IAN1有数据。在这方面的任何帮助都将非常感谢。谢谢。
以上来自于百度翻译 以下为原文 I am currently using the dsPIC33EP256MC506 where I have configured 8 IO as analog input. I have (I think i have) configured the ADC to scan the 8 analog inputs and the DMA to shunt the ADC data to a buffer (of size 9) in the RAM. I would generally like to have the data from each analog input placed in each element of the buffer and then read the buffer when the DMA generates an interrupt. However, the DMA seems to be placing the data only in the first two elements. Attached is the code for the configuration of the ADC and DMA generated by the MPLAB Code configurator and the DMA interrupt service routine. unsigned int BufferA[10]; extern unsigned int inAN0 = 0, inAN1 = 0, inAN3 = 0, inAN5 = 0, inAN8 = 0, inAN9 = 0, inAN10 = 0, inAN11 = 0, inAN12 = 0; typedef struct { uint8_t intSample; } ADC_OBJECT; static ADC_OBJECT adc1_obj; /** Section: Driver Interface */ void ADC1_Initialize (void) { // ASAM enabled; ADDMABM enabled; ADSIDL disabled; DONE disabled; SIMSAM Sequential; FORM Absolute decimal result, unsigned, right-justified; SAMP enabled; SSRC Internal Counter ends sampling and starts conversion; AD12B 12-bit; ADON enabled; SSRCG disabled; AD1CON1 = 0x94E6; // CSCNA enabled; VCFG0 VREF-; VCFG1 VREF+; ALTS disabled; BUFM disabled; SMPI 1; CHPS 1 Channel; AD1CON2 = 0x6400; // SAMC 2; ADRC FOSC/2; ADCS 255; AD1CON3 = 0x2FF; //ADDAEN enabled, DMABL allocates 2 words of buffer to each input AD1CON4 = 0x101; // CH0SA AN0; CH0SB AN0; CH0NB AVSS; CH0NA AVSS; AD1CHS0 = 0x0; // CSS26 disabled; CSS25 disabled; CSS24 disabled; CSS31 disabled; CSS30 disabled; AD1CSSH = 0x0; // CSS9 disabled; CSS8 enabled; CSS7 enabled; CSS6 enabled; CSS5 disabled; CSS4 disabled; CSS3 enabled; CSS2 enabled; CSS15 disabled; CSS1 enabled; CSS14 disabled; CSS0 enabled; CSS13 disabled; CSS12 disabled; CSS11 enabled; CSS10 enabled; AD1CSSL = 0xDCF; // CH123SA disabled; CH123SB CH1=OA2/AN0,CH2=AN1,CH3=AN2; CH123NA disabled; CH123NB CH1=VREF-,CH2=VREF-,CH3=VREF-; AD1CHS123 = 0x0; adc1_obj.intSample = AD1CON2bits.SMPI; } void ADC1_Tasks ( void ) { // clear the ADC interrupt flag IFS0bits.AD1IF = false; } void DMA_Initialize(void) { // Initialize channels which are enabled // AMODE Peripheral Indirect Addressing mode; CHEN enabled; SIZE 16 bit; DIR Reads from peripheral address, writes to RAM address; NULLW disabled; HALF Initiates interrupt when all of the data has been moved; MODE Continuous, Ping-Pong modes are disabled; DMA1CON= 0x20; //Enable DMA Channel later; // FORCE disabled; IRQSEL ADC1; DMA1REQ= 0xD; DMA1REQbits.IRQSEL = 13; // STA 0; DMA1STAH= 0x0000; DMA1STAL= __builtin_dmaoffset(BufferA); //DMA1STAL= &BufferA[0]; DMA1PAD = (int) &ADC1BUF0; //Point DMA0 to ADC1BUF0 DMA1CNT = 9; // Clearing Channel 1 Interrupt Flag; IFS0bits.DMA1IF = false; // Enabling Channel 1 Interrupt IPC3bits.DMA1IP = 1; // Set interrupt priority IEC0bits.DMA1IE = 1; //Enable DMA Channel 1 } void __attribute__ ( ( interrupt, no_auto_psv ) ) _DMA1Interrupt( void ) { inAN0 = BufferA[0]; inAN1 = BufferA[1]; inAN3 = BufferA[2]; inAN5 = BufferA[3]; inAN8 = BufferA[4]; inAN9 = BufferA[5]; inAN10 = BufferA[6]; inAN11 = BufferA[7]; inAN12 = BufferA[8]; IFS0bits.DMA1IF = 0; } When I read the inAN0 variables only inAN0 and inAN1 have data. Any help in this regards will be much appreciated. Thanks in advance. |
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BUMP,我真的对这个DSIC33 EP的ADC的一些工作代码感兴趣。
以上来自于百度翻译 以下为原文 BUMP, i'm really interested on some working code of the ADC of this dspic33EP. |
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我建议您阅读相关的参考手册章节,因为这是我所需要的使它工作。这是一些工作代码从一个项目使用DSSPICEV256GM106,看到有很多不同,与您的代码。我正在扫描7个频道。TE信道以升序扫描,从选择的One类比开始,只是一个结构,以确保编译器将所有变量保持在一起。另外,在调试上看到它更容易,它比数组更可读。根据采样请求和其他DMA请求的频率,我建议您给予DMA更多的优先权,否则,如果您恰好有两个或多个采集,而较高优先级的DMA请求被篡改。例如,如果你给一个更高的优先级,你可能会有很长时间的转移),你会失去样本-失去样本的一致性,例如,AN2获取将放在第三位,直到你重新配置ADC——没有来自DMA引擎的中断/陷阱(至少在dSPIC33 EV)
以上来自于百度翻译 以下为原文 I suggest you read the relevant Reference Manual chapter, as it was all i needed to make it work. this is some working code from a project using the dsPIC33EV256GM106, see that there are many differences with your code. I am scanning 7 channels. Te channels are scanned in ascending order, starting from the selected one analog_in_t analog_in; void DMA_Init() { /* DMA3 is used for ADC */ DMA3CON = 0; DMA3CONbits.MODE = 2; //Peripheral Indirect Mode DMA3REQ = 0xD; //DMA IRQ is from ADC1 conversion done DMA3STAH = 0; DMA3STAL = (uint16_t) &analog_in; DMA3STBH = 0; DMA3STBL = (uint16_t) &analog_in; DMA3PAD = (uint16_t) &ADC1BUF0; DMA3CNT = 6; DMA3CONbits.CHEN = 1; } void ADC_Init() { AD1CON1bits.AD12B = 0; //1 Channel, 10bit. AD1CON1bits.FORM = 0; //Integer out 0000.00dd.dddd.dddd AD1CON1bits.SSRCG = 0; //Auto Sampling AD1CON1bits.SSRC = 7; //and Converting AD1CON1bits.ASAM = 1; //Auto sample after last conversion AD1CON1bits.ADDMABM = 0; //DMA in scatter/gather mode AD1CON2bits.VCFG = 0; //Unnecessary. Vref+/- are tied to Avdd/Avss AD1CON2bits.CSCNA = 1; //Enable Channel Scan. AD1CON2bits.SMPI = 6; //DMA Address incremented after 7 conversions AD1CON2bits.BUFM = 0; //Always fill the buffer from the start location AD1CON2bits.ALTS = 0; //Always use MUX A AD1CON3bits.ADRC = 0; //Clock Derived from System Clock AD1CON3bits.ADCS = 0; // TAD = FP AD1CON3bits.SAMC = 8; //Tsample = 8 TAD. Total conversion time = 24 TAD AD1CON4bits.ADDMAEN = 1; //Enable DMA AD1CON4bits.DMABL = 0; //Allocate 1 word per ADC channel AD1CHS0 = 0; //CHS0 = AN0 AD1CSSH = 0x0800; //Scan channel 27 AD1CSSL = 0x101F; //Scan channels 0,1,2,3,4,12 IFS0bits.AD1IF = 0; AD1CON1bits.ADON = 1; } analog_in is just a structure i made to make sure the compiler keeps all the variables together. plus, it's somewhat easier to see on debug and it's more readable than an array. typedef struct { uint16_t sensor1; uint16_t sensor2; uint16_t sensor3; uint16_t sensor4; uint16_t sensor5; uint16_t sensor6; uint16_t sensor7; } analog_in_t; Depending on samplerate and frequency of other DMA requests i suggest you give the DMA more priority, otherwise if you happen to have two or more acquisitions while a higher priority DMA request is being excecuted (for example, if you give CAN a higher priority you will probably have looooooots of long transfers) you will - lose the sample - lose the coherency of the samples, for example AN2 acquisition will be put in AN3 place until you reconfigure the ADC - have no interrupts/traps from the DMA engine (at least on the dsPIC33EV) |
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