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HI——我使用MCC生成的I2C代码从设备寄存器(RTCC时钟)读取字节。作用域跟踪显示处理器写入设备地址和寄存器号,然后用读取位组再次写入地址(所有设备都被OK确定),但是读取两个字节而不是仅一个字节,并使总线处于奇数状态-数据和时钟线都保持低电平。简单地重置板(一个XPress板)并不能修复这个问题——在复位后,它等待第一个“开始”的完成。被调用的代码是:(对不起,我不知道如何将这个显示作为代码)UIT88T I2C1AREDIREBYTER(UIT88T地址,UIT88T REG){UIT88T结果=0;I2C。(地址& lt;lt;1);I2C1CON0BIT。R2SEN=1;I2C1CON0BIT。S=1;//STATE WAIT4STATESTORIDENE();SeNEdEnter(ReG);WaIT4MDRSET计数(1);地址=(UIT88T)(地址和lt;lt;1);I2C1ADB1=(UIT88T)(地址0x01);/ /改变R/W位读取I2C1CON0BIT。RSEN=0;I2;I2;I2C1ADB1=(uTn8It)C1CON0BIT,S=1;//STATE WAIT4STATESTORIDENE();结果=收件人();WaIT4Stutter();返回结果;它是否看起来像是在处理主状态的过程中丢失了什么东西,允许处理器读取两个字节,然后阻止它完成它的事务?我的设置是:MPLAB X V4.15XC8 V1.45 MCC V3.55.1MPLAB XPICPIC18F46K42评估Boad感谢这个词上的任何字。
以上来自于百度翻译 以下为原文 Hi -- I'm using MCC generated I2C code to read a byte from a device register (RTCC clock). Scope trace shows the processor writing the device address and register number, then writing the address again with the read bit set (all ACKed OK by the device), but then reading two bytes instead of just one and leaving the bus in an odd state -- both data and clock lines held low. Simply resetting the board (an Xpress board) doesn't fix this -- after reset it hangs up waiting for the first 'start' to be completed. The code being called is: (sorry, I don't know how to make this display as code) uint8_t i2c1_read1ByteRegister(uint8_t address, uint8_t reg) { uint8_t result = 0; I2C1_Initialize(); I2C1ADB1= (uint8_t)(address<<1); I2C1CNT=1; I2C1CON0bits.RSEN=1; I2C1CON0bits.S=1; //Start wait4StartComplete(); sendByte(reg); wait4MDRSetcount(1); address = (uint8_t)(address<<1); I2C1ADB1= (uint8_t)(address| 0x01); //Change the R/W bit for read I2C1CON0bits.RSEN=0; I2C1CON0bits.S=1; //Start wait4StartComplete(); result = receiveByte(); wait4Stop(); return result; } Does it look like something is missing in the way the master states are being handled that allows the processor to read two bytes then keeps it from finishing its transaction? My setup is: MPLAB X v4.15 XC8 v1.45 MCC v3.55.1 MPLAB Xpress PIC18F46K42 Evaluation board Thanks for any word on this. |
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序列是:[开始] [WR ID 0 ] [WR地址] [重新启动] [WR ID 1 ] [RD DAT] [Calp]通常您会有FUNC。这将读取一段长度的数据,并处理ACK/NACK.ValueI2CYGET(int id,int地址,Value*缓冲区,int Len);---------------2C1CNT=1;也许这应该是零,因为您不能读取零字节。
以上来自于百度翻译 以下为原文 Sequence is: [start] [wr id|0] [wr address] [restart] [wr id|1] [rd data] [stop] Normally you would have a func. that would read a Length string of data and handle ack/nack. void i2c_gets(int ID, int Address, void *Buffer, int Len); ---------------------- I2C1CNT = 1; maybe that should be a zero since you cannot read zero bytes. |
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谢谢你的回复。我认为产生[停止]有问题。我试着让I2C1CNT=0但它不起作用——它挂在某个地方(我可以进一步跟踪它)。有一个“读N字节”例程——我试着用长度参数2读取两个字节;它与读取一个字节类似。它正确读取两个字节,读取一个第三字节,然后挂掉时钟线和数据线高。重置处理器不释放总线——我需要删除电源来再次运行。
以上来自于百度翻译 以下为原文 Thanks for your reply on this. I think there's something wrong with generating the [stop]. I tried making I2C1CNT = 0 but that didn't work -- it hung up someplace (I can track that down further). There is a 'read N bytes' routine -- I tried that with the length parameter 2, to read two bytes; it worked similarly to reading one byte -- it read two bytes properly, read a third byte, then hung up with the clock line down and data line high. Resetting the processor doesn't free the bus -- I need to remove power to run it again. |
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HI,在读取操作中从I2C从接收到8位数据之后,传输不完整。主机必须发送ACK或NACK信号。NACK到传输完成的信号,ACK以信号表示从从属器需要更多数据。如果没有正确完成,则从站可以保持SDA线LO。W,尝试发送一个0位,并等待主机发送更多的SCL脉冲。取决于所选择的模式,ACKDAT=1,或/和ACKCNT=1;可能是需要的。迈西尔
以上来自于百度翻译 以下为原文 Hi, After Receiving 8 bits of data from I2C slave during a read operation, then transfer is Not complete. Master must then send ACK or NACK signal. NACK to signal that transfer is complete, ACK to signal that more data is wanted from slave. If this is not done correctly, then slave may hold SDA line Low, trying to send a 0 bit, and waiting for master to send more SCL pulses. Depending on mode selected, ACKDAT = 1, or/and ACKCNT = 1; may be needed. Mysil |
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+1,当我首次使用一个具有I2C EEPROM的(非MCC)项目中的PIC18F27 K42时,我观察到了“额外字节,I2C在恶劣状态下留下”现象,直到我更仔细地阅读数据表,发现了AcCNT在I2CXCON1寄存器中的功能。对于I2C,E-MCC“轻松设置”不设置此位,您可以将其设置在MCC的I2C1CON1寄存器设置中,或者您可以在应用程序代码中执行任何需要做的操作,以确保在访问“大多数”I2C设备之前设置ACKCNT。(有些人可能不需要这个,但根据我的经验,他们中的大多数人都是这样做的)底线:K42家庭是PIC18线的一个令人敬畏的补充。当然,我还没有对K42所提供的一切进行测试,但我对此非常满意。(DaveFootnote):至少有一个早期版本的MCC在I2C1ARead Debug Load()函数中有一个可怜的bug,其中一些(可能是善意的,但显然是业余的)斜杠/和/或烧录程序员。(显然)试图克服“额外字节”问题,只是让它读的字节比请求的字节少!这不仅解决不了问题,反而使问题变得更糟。我希望看到测试计划(以及测试结果)。哦,好吧……无论如何,MCPABX版本4.15中的MCC插件3.55.1对我起作用。
以上来自于百度翻译 以下为原文 +1 When I first used a PIC18F27K42 in a (non-MCC) project with an I2C EEPROM, I observed the "extra-byte, I2C-left-in-nasty-state" phenomenon until I read the Data Sheet a little more closely and discovered the function of ACKCNT in the I2CxCON1 register. Since I2C initialization code generated by the MCC "Easy Setup" for I2C doesn't set this bit, you can either set it in the I2C1CON1 Register settings of MCC or you can do whatever you need to do in the application code to make sure that ACKCNT is set before accessing "most" I2C devices. (Some might not need this, but in my experience, "most" of them do.) Bottom line: The 'K42 family is an awesome addition to the PIC18 line. Of course I haven't tested everything the 'K42 has to offer, but I'm very happy with it (so far). Regards, Dave Footnote: At least one earlier version of MCC had a pitiful bug in the i2c1_readDataBlock() function where some (probably well-meaning, but, apparently, amateurish) slash/and/burn programmer had (apparently) tried to overcome the "extra-byte" problem by simply having having it read fewer bytes than had been requested! Not only did that not solve the problem, it actually made it worse. I would like to have seen the test plan (and results of the testing). Oh, well... Anyhow, MCC plugin 3.55.1 in MPLABX version 4.15 works for me |
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看起来好像设置了AccNT位做了——读现在看起来不错(到目前为止,只是在这一点做了一点测试)。这绝对是一个晦涩难懂的场景。另一个线索是,当它不正常工作时,I2C1CON0中的MDR位被设置,表明主不知何故没有看到I2CCNT=0;主机刚刚保持在等待该计数的总线上。非常感谢答复。
以上来自于百度翻译 以下为原文 Looks like setting that ACKCNT bit did it -- reads look good now (so far -- just a little testing done at this point). That is definitely an obscure setting. The other clue to this is that when it wasn't working properly the MDR bit in I2C1CON0 was set, indicating that the master somehow hadn't seen that I2CCNT == 0; the master just held on to the bus waiting for that count. Thanks very much for the replies. |
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