请高手掌眼-我DIY的雕刻机CPU有没有错...

//------------------------------------------- Mycpu.v 文件的开始  -------------------------------------------
/******************************************************************************
`timescale 1ns/1ns
module CPU(input             clk,                //时钟
           input             reset_n,            //复位信号
           inout      [15:0] rddata,             //读数据
           output reg        rd,                 //读使能
           output reg        halt,               //停机指示
           output reg [12:0] addr               //地址
           );
           
         //CPU内部用寄存器
         reg [1:0]  state;                       //状态
         reg [12:0] ip;                          //指令指针. 
         reg [15:0]  opcode;                       //操作码
         reg [15:0] opx1;                       //x1
         reg [15:0] opy1;                       //y1
         reg [15:0] opx2;                        //x2
         reg [15:0] opy2;                        //y2
parameter HLT="HT", G0="G0", G1="G1";         
parameter S0=3'b000, S1=3'b001, S2=3'b010;S3=3'b011;S4=3'b100;S5=3'b101;S6=3'b110;
//s0指令处理,S1:计算,s2准备读指令S3读写数据X1,S4读写数据Y1,S5读写数据X2,S6读写数据Y2,


always@(posedge clk or negedge reset_n)
   if(!reset_n)                                  //如果复位有效
        begin
        rd<=1'b1;                                //读信号无效 
        halt<=1'b0;                              //清停机指示
        addr<=13'b0;                             //初始指令地址为0
        ip<=13'b0;                               //指令指针清0，从0地址执行程序
        state<=S2;                               //下一状态为读指令周期
        end
    else
            case(state)
            S0:                  
                    begin                        //读指令处理
                       state<=S1;              //设置下一状态
                opy2<=rddata;                          
                        case(opcode)      //根据操作码不同进行处理
                                HLT:             //停机
                                    begin
                                    rd<=1'b1;
                                      halt<=1'b1;    //置停机标志
                                    end
                                    G0:             //G0
                                     begin
                                             rd<=1'b1;
                                        ip<=ip+3'd5;   //指令指针加5                                        
                                    end
                                    G1:           //G1
                                    begin                              
                                            rd<=1'b1;            
                                        ip<=ip+12'd5;        //指令指针加5      
                                    end                                                    
                            endcase         
                end 
         S1:                                                  //计算周期          
                begin
                rd<=1'b1;                                    //下一状态读无效
                state<=S2;                           
                   case(opcode)
                        G0:                                 //执行G0
                        //执行G0
                        G1:                                //执行G1
                        //执行G1;
                       endcase
                end
            S2:                                                  //准备读指令
               begin
                     state<=S3;
                rd<=1'b0;                                    //设置度信号
                addr<=ip;                                    //指令地址  
                  
            end
        S3:                                                  //读写数据周期
              begin
                     state<=S4;
                opcode<=rddata;        
                rd<=1'b0;                                    //设置度信号 
                addr<=addr+3'd1;                                    //x1                             
            end
        S4:                                                  //读写数据周期
               begin
                     state<=S5;
                opx1=rddata;        
                rd<=1'b0;  
                addr<=addr+3'd1;                                //y1
        
            end
        S5:                                                  //读写数据周期
               begin
                     state<=S6;
                opy1=rddata;                          
                rd<=1'b0;  
                addr<=addr+3'd1;                             //x2                
            end
        S6:                                                  //读写数据周期
                 begin
                     state<=S0;
                opx2=rddata;          
                rd<=1'b0;                                    //设置度信号
                addr<=addr+3'd1;                                 //y2
            end
        
        endcase
endmodule
代码形式为:G1X1Y1X2Y2

为连续从外部RAM读入5个字,第一个字是操作码,第二个字是X1,第二个字是Y1,第二个字是X2,第二个字是Y2.
//它们之间是不是需要延时?,是不是用阻塞赋值?
//这段程序经过高手确定没问题以后,才能继续了.
//呵呵,需要安装CPLD模拟环境了,我还不会,现学.:)
//请高手指教，欢迎拍砖