在完成我的设计之后，“从VHDL文件开始”，包括“生成编程文件”，摘要说已经使用了16个可用的RAMB16-s中的14个，尽管我已经“明确地”仅使用了3个，
来自Aldec的SPARTAN3库中的“RAMB16_S9_S9”。
从原理图和状态图文件到VHDL文件的设计已在Aldec Ac
tive-HDL中完成。
在VHDL文件中的所有“component ...”链之后，它是ISE项目的输入，我只找到3个对“RAMB16_S9_S9”的引用。
ISE 13.3是否使用RAMB16-s作为逻辑？
或者为什么“太多太多”被ISE流程链中的“Map”映射到了？
/ dindea
以上来自于谷歌翻译
以下为原文
After a complete run of my design, "from the VHDL files on", including "Generate programming file", the Summary says that 14 of the 16 available RAMB16-s have been used, although I have "explicitly" used only 3, as "RAMB16_S9_S9" in the SPARTAN3 library from Aldec. The design, from schematics and state-diagram files to VHDL files, has been done in Aldec Active-HDL. Following all chains of "component ..." in the VHDL files, which are the input to the ISE project, I find only 3 references to "RAMB16_S9_S9".
Does ISE 13.3 use RAMB16-s for logic? Or why are "so much too many" mapped onto by "Map" in the ISE process chain?
/dindea
