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刘丰标

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[问答]

如何选择正确的STA309A输入设置

嘿,


我有问题选择正确的STA309A输入设置。
我目前的输入是I2S,有48个样本,512 * fs。

数据表的22-25位置有点令人困惑。在CONFA中我可以选择MSC,例如48个样本,512 * fs。但在第25页,我只能为I2S输入声音格式选择最大64 * fs。这些寄存器和设置有什么区别?
现在哪种配置是正确的?我在ADC和DSP上有一个24.576 MHz的Xti输入。

问候!

以上来自于谷歌翻译


以下为原文




Hey there,


i have problems to choose the right input setting of the STA309A.
My current input is I2S with 48 samples at 512*fs.

The sites 22-25 of the datasheet are a bit confusing. In CONFA i can choose a MSC e.g. of 48 samples with 512*fs. But at page 25 i only can choose a maximum of 64*fs for I2S input sound formats. What is the difference between those registers and settings?
Which configuration now is the right one? I have a XTI input of 24.576 MHz at the ADC's and the DSP.

Greetings!

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王云

2019-7-23 13:24:43
嗨,我,
主时钟可能是您馈送到ADC的时钟,因为ADC可能会向系统提供LRCK和BICK,然后I2S时钟必须与STA309A的主时钟同步,否则您将听到爆米花噪声。
如果ADC的设置为48Khz LRCK和3.072Mhz Bick,则还需要在0x00寄存器MSC位中更改STA309A输入设置,默认为256FS,对于512FS,48Khz,MSC位的值应为001。
谢谢
YT

以上来自于谷歌翻译


以下为原文





Hi Me ,
the Master clock could be the clock that you fed to ADC , since ADC may provide LRCK and BICK to system , then I2S clock must be synchronized with Master clock for STA309A , otherwise you will hear pop corn noise .
if the setting for ADC is 48Khz LRCK, and 3.072Mhz Bick, you need also change the STA309A input setting in 0x00 register MSC bits , it's 256FS in default , for 512FS ,48Khz , the value of MSC bits should be 001.
Thanks
YT
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刘丰标

2019-7-23 13:29:46
你好YT,
 
 
 就是我做了什么。但我仍然无法发出任何信号。寄存器0x00和0x01的时钟同步不是正确的设置吗?
 我说,在PWM设置中,STA发出50%的占空比信号。我如何解决丢失时钟的问题?我找不到任何错误的寄存器设置,我检查了我的电路板,例如,是一个捷径,或者如果STA没有收到XTI引脚上的信号,但一切都很好。
 我可以寄给我注册配置吗?
 
 谢谢,
 我

以上来自于谷歌翻译


以下为原文





Hi YT,


that is, what i did. But i still can't get out any signal. Isn't the clock synchronisation the right setting of registers 0x00 and 0x01?
I said, that in PWM setting the STA gives out a 50% duty cycle signal. How i can fix the problem of a loss clock? I can't find any wrong setting of the registers and i checked my board if there e.g. is a short cut or if the STA doesn't recieve a signal on the XTI pin, but everything is fine.
Shall i send you my register configuration?

Thanks,
mE
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王云

2019-7-23 13:50:53
嗨,我,
您可以参考数据表第18页中的原理图,了解MCLK连接,它是XTI输入。以下链接是最新的数据表。
http://www.st.com/content/ccc/resource/technical/document/datasheet/97/41/d6/a4/6b/2a/40/b9/CD00169555.pdf/files/CD00169555.pdf/jcr:内容/翻译/ en.CD00169555.pdf
和STA309A默认PWM输出处于三进制调制模式,如果静音位已设置,输出将停止,请根据数据表中的第36页调整音量和静音设置。
顺便说一下,您可以从ST网站下载Audioworkbench软件,以便快速访问STA309A寄存器。
谢谢
YT

以上来自于谷歌翻译


以下为原文





Hi Me ,
you can refer to schematic in datasheet  page 18 for MCLK connection, it's XTI input. below link is latest datasheet.

http://www.st.com/content/ccc/resource/technical/document/datasheet/97/41/d6/a4/6b/2a/40/b9/CD00169555.pdf/files/CD00169555.pdf/jcr:content/translations/en.CD00169555.pdf
and STA309A default PWM output is in ternary modulation mode ,if the mute bit had been set , the output will be stopped , please adjusted your volume and mute setting according to page 36 in datasheet .
by the way, you can download Audioworkbench software from ST website to get quick access of STA309A registers.
Thanks
YT
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刘丰标

2019-7-23 14:08:47
您好YT,
 
 
 谢谢回答!
 
 我现在从dsp中听到了声音。但仅限于第1频道和第8频道。
 在ch 1上我可以从i2s中选择我想要的每个输入通道。但是ch 8是固定的。
 我现在的设置是:192kSamples,(128 * fs)。
 我测量过的东西:
 XTI = 24.576 MHz,
 CKOUT = 28.8至29 MHz
 PWM输出〜仅227 kHz(配置F寄存器的@倍速设置)
 
 我非常喜欢STA309A - 它是一款功能强大的DSP,看起来很容易操作。
 我怎么能解决这个问题?它是PLL电路吗?例如我不能测量任何频率。或者PPLB引脚必须设置为高电平才能使能PLL? (PLLB在参考原理图中设置为低)。
 或者STA309无法处理24.576 MHz?
 
 谢谢!
 问候,
 我

以上来自于谷歌翻译


以下为原文





Hello YT,


thanks for answering!

I now got sound out of the dsp. But only on channel 1 and ch 8.  
on ch 1 i can select every input channel i want from i2s. but ch 8 is fixed.  
my setting now is: 192kSamples, (128*fs).
things i've measured:
XTI = 24.576 MHz,
CKOUT = 28.8 to 29 MHz
PWM Output ~ only 227 kHz (@ double speed setting at config F register)

i like the STA309A very much - it's so a powerful DSP and looks easy to handle.
how i can fix this problem? is it the PLL circuit? e.g. i cannot measure any frequence on it. or must the PPLB pin set to high to enable PLL? (PLLB set to low in the reference schematic).
or maybe the STA309 cannot handle 24.576 MHz?

Thank you!
Greetings,
mE
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