SlaveFIFO 32位错误

我也有同样的问题。我已经改写了FPGA代码没有成功。
软件中有硅缺陷或路径吗？
我们改变了USB控制器（对于我们的项目），因为我们没有解决任何问题。



     以下为原文
   I have exactly the same problem. I have rewritten the FPGA code without success.
    Is there any silicon bug or path to the software?
    We are changint the USB controller (for our project) because we did't fuond any solution.

你好，CusialBi，
让我们来分析一下数据。
在错误之前的GPIF总线上的32位字是1C 1D 1E 1F（第二行，字节13…16）二进制中的最后字节：0001 1111下一个32位字在总线上被假定为20 21 21 22 23（第三行，字节1…4）最后一个字节在二进制：4，但是FX3似乎捕获这个最后字节作为γ（x在十六进制）-位是HI。GH就像前面的单词在公共汽车上一样。对于下一个32位字之后，这个第四位已经正确地确定为0位。所有的错误完全一样。32位字的同一比特似乎从1到0太慢。这是定时误差的一个非常重要的特征。
你不认为信号完整性有问题。但是，你验证过FPGA的输出确实满足FX3数据设置要求吗？
最好的问候，
卡列夫



     以下为原文
  Hi cusialbi,
    Let's analyze the data.
    32-bit word on GPIF bus before error is 1C 1D 1E 1F  (2nd row, bytes 13...16)
last byte in binary: 0001 1111

Next 32-bit word on bus is assumed to be 20 21 22 23  (3rd row, bytes 1...4)
last byte in binary: 0010 0011

But FX3 seems to capture this last byte as 0011 0011 (33 in hex) - 4th bit is high like in previous word on bus. For next 32-bit word after that, this 4th bit has correctly settled to 0.  All the errors are exactly the same. The same bit of 32-bit word seems to go from 1 to 0 too slowly. This is very characteristic of  timing errors.
    You don't think there are problem with signal integrity. But, have you verified that FPGA output indeed fulfills FX3 data setup requirement?
    Best regards,
    kalev

你好，
他同意卡莱夫给出的推理。
这无疑是一个与时间有关的问题。
谢谢，
西克里希纳。



     以下为原文
  Hi,
    I totally agree with the reasoning that has been given by kalev.
    This is definitely a timing related issue.
    Thanks,
    sai krishna.

谢谢你的回复，
问题就在这里，我会努力解决的。
最好的问候



     以下为原文
   Thank you for the reply,
    the problem is exactly that, I'll try to solve it.
    Best regards