如何在不使用DDR内存控制器的情况下设计FPGA BRAM大容量存储单元？

你好
如何在不使用DDR内存控制器的情况下设计FPGA BRAM（或任何其他内存模块_SD，DDR以外的本地等）大容量存储单元？当我通过示例设计“VC707_bist”替换DRAM控制器和BRAM控制器来修改示例设计时
大容量存储）“，我无法在计算机上看到任何大容量存储单元？
作为一个细节，
VC707板是我们设计基于USB大容量存储单元的BRAM内存模块的硬件平台，选择VC707_bist设计实例作为参考项目。“u***2_device”IP驱动程序加载到Microblaze本地内存中.bss部分被选为mig_7series DDR使用
链接器脚本。
有用。
然后，我通过用512K BRAM替换DRAM来修改我的设计。
我删除了mig_7series IP并将BRAM连接到AXI总线。
我还将Microblaze M_AXI_IC和M_AXI_DC端口连接到BRAM，并检查了MB缓存地址覆盖BRAM地址空间。
所有系统时钟（MB，AXI，BRAM控制器）都连接到100MHz。我使用“xu***_storage.h”文件中的RAMDISKSECTORS参数来符合BRAM大小。“u***2_device”将IP驱动程序加载到Microblaze本地内存中并选择.bss部分
asBRAM onlinker脚本。
不幸的是，它不起作用。
我逐步调试驱动程序代码，我可以在调试窗口看到我的BRAM作为内存，但我在计算机上看不到任何大容量存储单元。
甚至，我尝试通过将它们连接到不同的AXI总线来使用DDR和BRAM，将微型M_AXI_IC和M_AXI_DC端口指向BRAM并选择.bss部分到BRAM。
这意味着，DDR在设计中，但它没有被积极使用。它有趣的工作。
可能是什么问题呢？
有用的建议将是一件非常愉快的事情。
谢谢。



以下为原文

Hello

How can I design FPGA BRAM (or any other memory module _SD, local etc_ other than DDR) mass storage unit without using DDR memory controller? When I modified example design by replacing DRAM controller with BRAM controller on the example design "VC707_bist (DRAM as a mass storage)", I could not be able to see any mass storage unit on my computer?

As a detail,
VC707 board is our hardware platform to design a BRAM memory module based USB mass storage unit and VC707_bist design example is chosen as a reference project. "u***2_device" IP drivers are loaded into Microblaze local memory and .bss section is selected as mig_7series DDR by using linker script. It works.

Then, I modified my design by replacing DRAM with 512K BRAM. I removed mig_7series IP and connected BRAM to AXI bus. I also connected Microblaze M_AXI_IC and M_AXI_DC ports to BRAM and checked the MB cache addresses cover BRAM address space. All system clocks (MB, AXI, BRAM controller) are connected 100MHz. I played with RAMDISKSECTORS parameter on "xu***_storage.h" file to fit into BRAM size. "u***2_device" IP drivers are loaded into Microblaze local memory and .bss section is selected as BRAM on linker script. Unfortunately, It does not work.  

I debuged driver codes step by step, I can see my BRAM as a memory on debug window, but I can not see any mass storage unit on my computer.

Even, I tried to use both DDR and BRAMs by connecting them to different AXI buses, pointing Microblaze M_AXI_IC and M_AXI_DC ports to BRAM and selecting  .bss section to BRAM. It means, DDR is in the design but it is not actively used. It interestingly worked.

What could be the problem? It will be a great pleasure for helpful advices.

Thanks.