使用vivado 2014.2/2014.4添加MMCM后无法调试电路板

错误似乎是因为你的时钟没有运行。
我看到你有一些计数器位去LED。
加载MMCM设计时，这些LED信号是否会切换？
如果没有，请确保您的MMCM（sysclk_125m_p / n）时钟正在运行且MMCM未被保持复位状态。
您可能还希望将MMCM锁定状态带到LED。
-  Gabor



以下为原文

The error seems to be because your clock is not running.  I see you have some counter bits going to LED's.  Are these LED signals toggling when you load the MMCM design?  If not, make sure your clock to the MMCM (sysclk_125m_p/n) is running and the MMCM is not being held reset.  You might also want to bring the MMCM locked status to LEDs.
-- Gabor

嗨，JTAG电缆频率是否低于ILA核心频率？
如果不是，请尝试减少jtag的频率，看看它是否有帮助。谢谢，Deepika。
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以下为原文

Hi,

Is the JTAG cable frequency less than ILA core frequency? If no, try reducing the jtag frquency and see if it helps.

Thanks,
Deepika.Thanks,
Deepika.
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感谢您的回复。
LED都在切换。我看到功率增加的电流。显示FPGA正在运行。时钟没问题。
我使用相同的代码在ISE14.7中创建了一个新项目。唯一的区别是约束文件，将xdc更改为ucf。
然后我可以使用Chipscope调试项目。
所以这很奇怪。
这可能是我的新vivado许可证。
错误？



以下为原文

Thanks for your reply.
The LEDs are are all toggling.And I see the current of the power increases. Both show FPGA is running.The clock is all right. 
I made a new project in ISE14.7 using the same code.The only difference is the constraint file, changing xdc into ucf.
Then I can debug the project using Chipscope.
So this is strange.
 
Is that possible that my new license of vivado has sth. wrong? 
 

感谢您的回复。
我在JTAG时钟上尝试了12MHz和6MHz。结果是一样的。
我使用相同的jtag电缆将ISE创建的位文件下载到FPGA中。然后我可以用chipcope调试FPGA。
所以电缆没问题。



以下为原文

Thanks for your reply.
I tried 12MHz and 6MHz on the JTAG clock.The result is the same.
I download the ISE-created bit file into FPGA, using the same jtag cable.And then I can debug the FPGA with chipscope.
So the cable is all right.