嗨,所有的,我试图提出一个自定义板,这是基于PIC32 MZ2048 EFH144以太网启动套件,即相同的24MHz晶体,但不同的设备。系统运行在200兆赫。如果我试图调试使用ICD 3,我得到以下信息:我可以让它使用内部OSC工作这里是我的设置与外部时钟-恰巧是相同的使用以太网起动器套件。有任何想法为什么这不起作用?谢谢。
以上来自于百度翻译
以下为原文
Hi All,
I'm attemp
ting to bring up a custom board which is based upon the PIC32MZ2048EFH144 Ethernet starter kit i.e. same 24MHz crystal but different device.
The system is running at 200MHz.
If I attempt to debug using the ICD 3 I get the following message:Programming...
The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0x1bfff
boot config memory
configuration memory
Programming/Verify complete
The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.
I can make it work by using the internal oscillator.
Here are my settings with the external clock - which happen to be exactly the same as using the Ethernet starter kit.
/*** DEVCFG0 ***/
#pragma config DEBUG = OFF
#pragma config JTAGEN = OFF
#pragma config ICESEL = ICS_PGx2
#pragma config TRCEN = OFF
#pragma config BOOTISA = MIPS32
#pragma config FECCCON = OFF_UNLOCKED
#pragma config FSLEEP = OFF
#pragma config DBGPER = PG_ALL
#pragma config SMCLR = MCLR_NORM
#pragma config SOSCGAIN = GAIN_2X
#pragma config SOSCBOOST = ON
#pragma config POSCGAIN = GAIN_2X
#pragma config POSCBOOST = ON
#pragma config EJTAGBEN = NORMAL
#pragma config CP = OFF
/*** DEVCFG1 ***/
#pragma config FNOSC = SPLL
#pragma config DMTINTV = WIN_127_128
#pragma config FSOSCEN = OFF
#pragma config IESO = OFF
#pragma config POSCMOD = EC
#pragma config OSCIOFNC = OFF
#pragma config FCKSM = CSECME
#pragma config WDTPS = PS1048576
#pragma config WDTSPGM = STOP
#pragma config FWDTEN = OFF
#pragma config WINDIS = NORMAL
#pragma config FWDTWINSZ = WINSZ_25
#pragma config DMTCNT = DMT31
#pragma config FDMTEN = OFF
/*** DEVCFG2 ***/
#pragma config FPLLIDIV = DIV_3
#pragma config FPLLRNG = RANGE_5_10_MHZ
#pragma config FPLLICLK = PLL_POSC
#pragma config FPLLMULT = MUL_50
#pragma config FPLLODIV = DIV_2
#pragma config UPLLFSEL = FREQ_24MHZ
/*** DEVCFG3 ***/
#pragma config USERID = 0xffff
#pragma config FMIIEN = OFF
#pragma config FETHIO = ON
#pragma config PGL1WAY = ON
#pragma config PMDL1WAY = ON
#pragma config IOL1WAY = ON
#pragma config FUSBIDIO = ON
/*** BF1SEQ0 ***/
#pragma config TSEQ = 0x0000
#pragma config CSEQ = 0xffff
Any ideas why this does not work?
Thanks.