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李艳玮

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[问答]

NvSRAM RWI抑制与WE线对比关系是什么?

我有一个关于数据表中的RWI抑制的问题。这是内在的抑或是由我们控制的关系是什么?如果我们不在前20毫秒,那么什么是损坏数据的概率。你能再详细阐述一下这个观点吗?

以上来自于百度翻译


     以下为原文
  I have a Question about the RWI Inhibit in the Datasheet.   Is that an internal Inhibit, or is it  controlled by the WE what is the relationship?  If WE is not up the first 20 ms, what is the probability of having corrupted data.   Can you elaborate more on that relatinoship.  

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屈鑫燕

2019-3-20 14:35:22
嗨,Maged,
RWI是内部抑制。它不是由我们控制的。在RWI期间,W/PIN或任何其他控制引脚的状态没有相关性。因此,在RWI期间,数据不能以任何方式被破坏。只有在RWI结束时,我们的情况才是重要的。因此,我们建议在W/Win上进行拉拔,以确保在启用RWI之后(控制器仍在启动)不需要写入。
谢谢
拉维
注意:为了说明显而易见的情况,只有当NVSRAM已经完成启动时,控制器IO处于三态,即在结束时结束,而不是处于低状态时,拔出才有帮助。此外,您可以看到,而不是我们/您可以确保CE/IS高,这将有相同的效果,因为任何意外的写作只能发生在CE//和我们/看到在引脚低的条件。

以上来自于百度翻译


     以下为原文
  Hi Maged,
    RWI is an internal inhibit. It is not controlled by WE/. During RWI, condition of WE/ pin or any other control pin has no relevance. And hence, data cannot be corrupted by any means during RWI. Only at the end of the RWI, the WE/ condition will matter. Therefore, we suggest a pull up on WE/ pin to ensure that unwanted writes do not happen after RWI is enabled (and the controller is still booting up).
    Thanks
    Ravi
    Note: To state the obvious, the pull up helps only if the controller IO is in tristate when nvSRAM has completed boot up - at end of tHRECALL - and not if it is in LOW state. Also, you can see that instead of WE/ you can ensure CE/ is HIGH which would have the same effect since any unintended write can happen only if both CE/ and WE/ see a LOW condition at the pins.
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