是否可以购买UNISIM库的许可证以在ASIC中使用

cbuchendu写道：
大家好...
让我们看看谁知道答案：我们正在尝试根据Xilinx的设计制造ASIC。
该设计是结构性的，使用UNISIM库。
现在，是否可以支付在我们的ASIC中使用UNISIM库的权利？
非常感谢任何人都知道答案。
正如人们可能从名称中猜测的那样，unisim库是行为模拟模型。
这些模型的源代码很容易获得（它位于Xilinx工具安装树中），并且根本无法合成。
提供模型以便工程师可以模拟使用各种Xilinx原语和块的设计（例如DCM，DDR I / O，输入和输出序列化器等）。
当您使用这些不同的原语进行综合时，您需要在源代码中使用unisim库;
您使用的包包含必要的组件声明。
您可以将它用于模拟，因为它是行为模型的接口。
因此，简短的故事是：这些原语本身没有“许可证”，因为库所做的只是提供了一个硬件功能的钩子。
如果您的设计依赖于Xilinx DCM，那么您必须看看您的ASIC工厂在其IP列表中是否有类似的东西，并且您可能需要重新编写代码以利用它。
----------------------------是的，我这样做是为了谋生。
在原帖中查看解决方案



以下为原文

cbuchendu wrote:
Hi all...
 
Let's see who knows the answer to this:  We are trying to fab an ASIC based on a design done in Xilinx.  The design is structural and uses the UNISIM libraries.  Now, is it possible to pay for the right to use the UNISIM libraries in our ASIC?
 
Much thanks to whomever knows the answer.

The unisim libraries are, as one might guess from the name, behavioral simulation models. The source code for these models is readily available (it's in the Xilinx tools installation tree), and it is very much not synthesizable at all.
 
The models are provided so the engineer can simulate a design which uses the various Xilinx primitives and blocks (such as the DCMs, the DDR I/O, the input and output serializers, etc etc). 
 
You need to use the unisim library in your source code when you synthesize using those various primitives; the package you used includes the necessary component declarations. You use it for simulation because it's the interface to the behavioral models.
 
So, the short story is: there's no "license" per se for those primitives because all that the library does is provide a hook into something that's a hardware feature. If your design depends on a Xilinx DCM, then, you'll have to see if your ASIC fab has something similar in their IP list, and you'll probably have to rework your code to take advantage of it.
----------------------------Yes, I do this for a living.View solution in original post

有人指点我参加UNISIM图书馆的许可协议;
我似乎无法找到它们。



以下为原文

how about someone pointing me to the license agreement for the UNISIM libraries; I can't seem to find them.

这是您在安装包含verilog / src / unisims目录的Xilinx软件时同意的许可证：http：//www.xilinx.com/support/documentation/sw_manuals/end-user-license-agreement.txt
- 如果提供的信息有用，请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。



以下为原文

This is the license to which you agreed when you installed the Xilinx software which contains the verilog/src/unisims directory:

http://www.xilinx.com/support/documentation/sw_manuals/end-user-license-agreement.txt- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

cbuchendu写道：
大家好...
让我们看看谁知道答案：我们正在尝试根据Xilinx的设计制造ASIC。
该设计是结构性的，使用UNISIM库。
现在，是否可以支付在我们的ASIC中使用UNISIM库的权利？
非常感谢任何人都知道答案。
正如人们可能从名称中猜测的那样，unisim库是行为模拟模型。
这些模型的源代码很容易获得（它位于Xilinx工具安装树中），并且根本无法合成。
提供模型以便工程师可以模拟使用各种Xilinx原语和块的设计（例如DCM，DDR I / O，输入和输出序列化器等）。
当您使用这些不同的原语进行综合时，您需要在源代码中使用unisim库;
您使用的包包含必要的组件声明。
您可以将它用于模拟，因为它是行为模型的接口。
因此，简短的故事是：这些原语本身没有“许可证”，因为库所做的只是提供了一个硬件功能的钩子。
如果您的设计依赖于Xilinx DCM，那么您必须看看您的ASIC工厂在其IP列表中是否有类似的东西，并且您可能需要重新编写代码以利用它。
----------------------------是的，我这样做是为了谋生。



以下为原文

cbuchendu wrote:
Hi all...
 
Let's see who knows the answer to this:  We are trying to fab an ASIC based on a design done in Xilinx.  The design is structural and uses the UNISIM libraries.  Now, is it possible to pay for the right to use the UNISIM libraries in our ASIC?
 
Much thanks to whomever knows the answer.

The unisim libraries are, as one might guess from the name, behavioral simulation models. The source code for these models is readily available (it's in the Xilinx tools installation tree), and it is very much not synthesizable at all.
 
The models are provided so the engineer can simulate a design which uses the various Xilinx primitives and blocks (such as the DCMs, the DDR I/O, the input and output serializers, etc etc). 
 
You need to use the unisim library in your source code when you synthesize using those various primitives; the package you used includes the necessary component declarations. You use it for simulation because it's the interface to the behavioral models.
 
So, the short story is: there's no "license" per se for those primitives because all that the library does is provide a hook into something that's a hardware feature. If your design depends on a Xilinx DCM, then, you'll have to see if your ASIC fab has something similar in their IP list, and you'll probably have to rework your code to take advantage of it.
----------------------------Yes, I do this for a living.