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[问答]

Shape builder 18-119无法通过形状创建I/O LOGIC路径

大家好,
我收到以太网实例的严重警告。
[Shape Builder 18-119]无法创建I / OLOGIC Route Through形状,例如design_testjig_wrapper_inst / design_testjig_i / axi_ethernet_1 / inst / eth_mac / inst / rgmii_interface / rgmii_rx_ctl_ibuf_i。
在形状中找到重叠的实例:design_testjig_wrapper_inst / design_testjig_i / axi_ethernet_0 / inst / eth_mac / inst / tri_mode_ethernet_mac_i / rgmii_interface / rgmii_rx_ctl_ibuf_i和design_testjig_wrapper_inst / design_testjig_i / axi_ethernet_1 / inst / eth_mac / inst / rgmii_interface / rgmii_rx_ctl_ibuf_i。
我的设计有两个1G / 2.5G以太网子系统,其中一个包含在核心中的共享逻辑,第二个包含在示例设计中的共享逻辑。请在下面找到设计的附加快照。
请帮助我理解为什么我收到此警告,我该如何解决这个问题。
谢谢。

以上来自于谷歌翻译


以下为原文

Hi All,
I am getting a critical warning for the Ethernet instances.

[Shape Builder 18-119] Failed to create I/OLOGIC Route Through shape for instance design_testjig_wrapper_inst/design_testjig_i/axi_ethernet_1/inst/eth_mac/inst/rgmii_interface/rgmii_rx_ctl_ibuf_i. Found overlapping instances within the shape: design_testjig_wrapper_inst/design_testjig_i/axi_ethernet_0/inst/eth_mac/inst/tri_mode_ethernet_mac_i/rgmii_interface/rgmii_rx_ctl_ibuf_i and design_testjig_wrapper_inst/design_testjig_i/axi_ethernet_1/inst/eth_mac/inst/rgmii_interface/rgmii_rx_ctl_ibuf_i.

my design has two 1G/2.5G Ethernet subsytem,where one is included shared logic in core and second one is included shared logic in example design.please find the attached snapshot of the design below.

Please help me to understand why i am getting this warning and How can i solve this.

Thank You.

回帖(3)

俞丽

2018-11-13 14:23:15
嗨@ poornima_95。
目标部件是7系列设备吗?
该消息看起来如此,但我想确认一下。
另外,您能指出消息中两个实例的原语类型吗?
形状是内部生成的相对放置的宏,旨在帮助place_design。
IO实例需要具有正确的相对坐标。
此消息表示形状内存在重叠。
我会尝试检查两个内核是否存在冲突的IO约束。
在原帖中查看解决方案

以上来自于谷歌翻译


以下为原文

Hi @poornima_95. Is the target part a 7-Series device? The message looks to indicate so, but I wanted to confirm. Also, can you indicate what type of primitives the two instances in the message are?
 
A shape is an internally generated relatively placed macro that is intended to assist place_design. IO instances would need to have the correct relative coordinates. This message would indicate that there is overlap within the shape. I would try checking if the two cores have conflicting IO constraints.
View solution in original post
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俞丽

2018-11-13 14:29:09
嗨@ poornima_95。
目标部件是7系列设备吗?
该消息看起来如此,但我想确认一下。
另外,您能指出消息中两个实例的原语类型吗?
形状是内部生成的相对放置的宏,旨在帮助place_design。
IO实例需要具有正确的相对坐标。
此消息表示形状内存在重叠。
我会尝试检查两个内核是否存在冲突的IO约束。

以上来自于谷歌翻译


以下为原文

Hi @poornima_95. Is the target part a 7-Series device? The message looks to indicate so, but I wanted to confirm. Also, can you indicate what type of primitives the two instances in the message are?
 
A shape is an internally generated relatively placed macro that is intended to assist place_design. IO instances would need to have the correct relative coordinates. This message would indicate that there is overlap within the shape. I would try checking if the two cores have conflicting IO constraints.
举报

文妮

2018-11-13 14:40:19
嗨@ marcb,
谢谢您的回复。
我已经解决了这个警告,因为你说这是因为IO约束冲突。
两个rx_clk缓冲区重叠。
是的目标是7系列设备。

以上来自于谷歌翻译


以下为原文

Hi@marcb ,
Thank you for your reply. I have already solved this warning, as you said it was because of the conflicting IO constraints. the two rx_clk buffers were overlapping.
 and yes the target is 7 series device.
 
 
 
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