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[问答]

Shape Builder 18-119无法创建I/OLOGIC路由

大家好,
我一直在从一系列合成迭代开始和关闭这些迭代。
有人能告诉我为什么会这样吗?
时钟太多了?
解决办法是什么?
[形状生成器18-119]未能创建I / OLOGIC借道形状例如system_i / ddr3_ctrl / u_system_ddr3_ctrl_0_mig / u_memc_ui_top_axi / mem_intfc0 / ddr_phy_top0 / u_ddr_mc_phy_wrapper / gen_dqs_iobuf_HP.gen_dqs_iobuf [0] .gen_dqs_diff.u_iobuf_dqs / IBUFDS / IBUFDS_S。
无法将实例ddr3_sdram_dqs_p [0]添加到新的I / OLOGIC_RouteThrough形状。
该实例已属于某个形状,其新位置与现有形状中的位置冲突。
谢谢
弗拉德
弗拉迪斯拉夫·穆拉文

以上来自于谷歌翻译


以下为原文

Hi All,

I keep having these on and off from one series of synthesis iterations to another.

Can someone tell me why these are happening? Too many clocks? What is the solution?

[Shape Builder 18-119] Failed to create I/OLOGIC Route Through shape for instance system_i/ddr3_ctrl/u_system_ddr3_ctrl_0_mig/u_memc_ui_top_axi/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/gen_dqs_iobuf_HP.gen_dqs_iobuf[0].gen_dqs_diff.u_iobuf_dqs/IBUFDS/IBUFDS_S. Failed to add instance ddr3_sdram_dqs_p[0] to a new I/OLOGIC_RouteThrough shape. The instance already belongs to a shape and its new location conflicts with the one in the existing shape.


Thanks
Vlad
Vladislav Muravin

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石俊梅

2018-10-19 14:49:13
弗拉德,
你能告诉我们以下实例的连通性吗?
system_i / ddr3_ctrl / u_system_ddr3_ctrl_0_mig / u_memc_ui_top_axi / mem_intfc0 / ddr_phy_top0 / u_ddr_mc_phy_wrapper / gen_dqs_iobuf_HP.gen_dqs_iobuf [0] .gen_dqs_diff.u_iobuf_dqs / IBUFDS / IBUFDS_S
ddr3_sdram_dqs_p [0]
谢谢,
迪皮卡。
谢谢,迪皮卡.----------------------------------------------
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以上来自于谷歌翻译


以下为原文

Hi Vlad,
 
Can you show us the connectivity of below instances
 
system_i/ddr3_ctrl/u_system_ddr3_ctrl_0_mig/u_memc_ui_top_axi/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/gen_dqs_iobuf_HP.gen_dqs_iobuf[0].gen_dqs_diff.u_iobuf_dqs/IBUFDS/IBUFDS_S
 
ddr3_sdram_dqs_p[0]
 
 
Thanks,
Deepika.
Thanks,
Deepika.
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刘佳

2018-10-19 14:54:34
嗨Deepika,
谢谢你的回应。
获得了sch和pdf的原理图。
还有一个缩放版本显示8个DQS信号。
希望这就是你的要求。
对此的帮助非常高兴。
我们的时间分数非常高,看起来就像这些网。
问候
弗拉德
弗拉迪斯拉夫·穆拉文
schematic.pdf 19 KB
schematic.sch 75 KB
schematic_zoom.pdf 338 KB

以上来自于谷歌翻译


以下为原文

Hi Deepika,
Thanks for responsing to this.
Attahed schematic, both sch and pdf. There is also a zoomed version showing 8 DQS signals.
Hope this is what you asked.
Help on this is very much apprecaited. Our timing score is very high and looks like it is around these nets.
Regards
Vlad
 
Vladislav Muravin            schematic.pdf ‏19 KB                schematic.sch ‏75 KB                schematic_zoom.pdf ‏338 KB
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王刚

2018-10-19 15:00:23
在什么vivado版本中你得到CW消息?
你打开了phys_opt_design吗?
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-----------------------不要忘记回答,kudo,并接受为解决方案.-------------
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以上来自于谷歌翻译


以下为原文

In what vivado version did you get the CW messages? Did you turn on phys_opt_design?
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Don't forget to reply, kudo, and accept as solution.
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刘佳

2018-10-19 15:06:01
2014.2,Linux x64
我们在选择之后运行phy_opt并且在重新定时之后运行
弗拉迪斯拉夫·穆拉文

以上来自于谷歌翻译


以下为原文

2014.2, Linux x64
we run phy_opt after opt and after route with retiming
 
Vladislav Muravin
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