F28069 SCI为什么进不了中断？是什么原因导致的？如何解决？

sam,
再仔细检查一下关于中断的设置：
 EALLOW;  // This is needed to write to EALLOW protected registers   
 PieVectTable.SCIRXINTA = &sciaRxIsr;   
PieVectTable.SCITXINTA = &sciaTxIsr;   
 EDIS;
// Enable interrupts required for this example  
  PieCtrlRegs.PIECTRL.bit.ENPIE = 1;  
 // Enable the PIE block    PieCtrlRegs.PIEIER9.bit.INTx1=1;    
 // PIE Group 9, INT1    PieCtrlRegs.PIEIER9.bit.INTx2=1;    
 // PIE Group 9, INT2    IER = 0x100; // Enable CPU INT
另外通过仿真界面，查看RXRDY标志位有没有置一。
Eric
                                                                         - ERIC

Eric,
我的中断设置检查过了，接收中断是一致的，发送我用的是定时发送，但是进不了接收中断，现在我把程序改成用FIFO接收一个字就进入中断仿真就可以了，程序初始化设置如下：
 SciaRegs.SCICCR.all =0x0007;      // 1 stop bit,  No loopback
                                       // No parity,8 char bits,
                                       // async mode, idle-line protocol
 SciaRegs.SCICTL1.all =0x0003;     // enable TX, RX, internal SCICLK,
                                       // Disable RX ERR, SLEEP, TXWAKE
 SciaRegs.SCICTL2.bit.TXINTENA =0;
 SciaRegs.SCICTL2.bit.RXBKINTENA =1;
 SciaRegs.SCIHBAUD = 0x01;
 SciaRegs.SCILBAUD = 0x03;    //baudrate set 9600
 SciaRegs.SCIFFTX.all=0xC041;
 SciaRegs.SCIFFRX.all=0x0021;
 SciaRegs.SCIFFCT.all=0x00;
 SciaRegs.SCICTL1.all =0x0023;       // Relinquish SCI from Reset
 SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
 SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
中断设置为：
EALLOW;
 PieVectTable.TINT0 = &cpu_timer0_isr;
 PieVectTable.SCIRXINTA = &sciaRxIsr;
EDIS；
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
 PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT3 SCIATINT
 IER = 0x100; // Enable CPU INT
 //使能全局中断
 EINT;   // Enable Global interrupt INTM
 ERTM;   // Enable Global real time interrupt DBGM