Design considerations for three-phase power factor correction

The need for the current waveform to track the voltage on a three-phase power system leads to a second set of requirements, in addition to those for a single-phase power factor correction (PFC) system. Besides all three phases needing high power factor (the current waveform must track the voltage waveform), there is the further requirement that the power drawn from each phase must be the same.

This article discusses one way of providing this function. In addition, it will point readers to further sources of further on how to design each of the required elements.

Figure 1 shows the relation of the voltages in each of the three phases with respect to each other. Phase 0 is the thickest (red) line. Phase 1 (black line) is leading Phase 0 by 120 degrees. Phase 2 (purple line) is trailing Phase 0 by 120 degrees. (In the figures, when x = 25, the angle is π (pi) radians.)

When first presented with the problem, many designers will assume that a three-phase rectifier driving into a PFC converter on the front end will provide a solution.

If the designer takes the three phases and connects them into a PFC as is shown in Figure 2, the current waveforms in the three leads will not achieve the desired result.

As seen from the waveform in Figure 3, the current in each phase is discontinuous for a large portion of the time, even though the voltage is substantially above zero volts (see voltage waveforms of Figure 1). By definition, a PFC circuit is required to make the inputcurrent to the PFC look like it is going into a resistor connected between line and neutral. So the current waveforms should be the same as the voltage in Figure 1, with scaling to allow for the power consumption.

The needed solution is one that will provide the PFC function for each of the lines and, at the same time, make certain that the load on each of the lines is balanced. This requires three main building blocks plus some ancillary circuits.

The first circuit that each of the lines will see coming into the system is the PFC converter section which consists of three separate PFC converters isolated from each other. The design of these should allow for about 50 percent more power instantaneously, but about 15 percent more power thermally. The design of the PFC section is described in Reference 1.

The second stages of the system are the downstream converters. These converters are where the outputs come together to power the load. Isolation is required between the input and outputs of each converter. All outputs will be connected together. All units must operate and come up together. Therefore, the controller for these units needs to be on the secondary side of the converters.

For several reasons, each downstream converter must be operating as a standalone unit on a common ground point, but they all must be linked so that they can share the load. The first reason the secondary converters must operate independently is that each unit's input voltage is the output of a different PFC, hence, a different input level. This alone requires a separate controller, as each of the PFC converter outputs has a significant ripple at twice the line frequency, but with a 120-degree phase difference.

Additionally, since this is the point at which the outputs are forced to share the load, a single controller will not work because the controllers must adjust their current levels to be load sharing. The design of these converters, therefore, must incorporate remote sensing and allow for load sharing.

At power levels that are used with three-phase inputs, the phase-shifted full bridge offers many distinct advantages over most other topologies. The design of a phase-shifted full bridge is discussed in Reference 2 and Reference 3.

The power switches on the primary side of a phase-shifted, full-bridge converter are driven through transformers. Since all three phase-shift controllers need to power the same load, and since this is the stage where isolation is provided, it makes sense to have the control IC on the secondary side. By doing this, the use of the transformers provides the isolation function that is required in any case.

The third stage is the load share circuit. This stage monitors the outputs from each of the downstream converters and forces them to share the load equally. This, in turn, forces the PFC section to pull the same amount of power off the input lines, and results inload balancing on the three phases. Reference 4 provides a design guide for a load share circuit.

Figure 4 describes the basic circuit needed to achieve three-phase power correction.

The ancillary circuits provide for housekeeping power, synchronization, startup control and monitoring, plus other functions.

The first of these circuits is an internal auxiliary power supply. Since all of the PFC converters must be powered from isolated supplies, and the secondary controllers and various ancillary circuits require isolated power before the secondary converters are powered, a separate housekeeping converter is a necessary feature. As each of the PFC sections is identical, this housekeeping converter has its own three-phase rectification with isolated outputs to each of the PFC converters on the primary side, and an output to the secondary-side downstream converters and current-share circuitry.

Another required circuit is some form of switch/current limit that allows the initial charging of the PFC output capacitor without a large current pulse or resonant overshoot of the PFC output voltage. This is shown in Figure 4 as a relay and resistor. The resistor allows the output capacitor of the PFC to charge before the relay is activated and the PFC starts operation. This requires isolated voltage monitoring of each PFC's output-capacitor voltage, and a relay driver. The auxiliary supply then provides the power to energize the relay and power the PFC section to bring the section up to full power.

Once all three PFCs are enabled and up to voltage (which requires a second voltage monitor), then all the secondary converters can be simultaneously powered and brought up under softstart, so that they come up at the same rate. Since they all have the same ground point on their outputs, the circuitry to achieve this simultaneous start is relatively easy to design. Amonitor circuit on each of the PFCs to make certain that all PFC outputs are up to value could be as simple as a comparator on the primary which monitors the PFCs' output voltages and activates optocouplers. If the phototransistors of the optocouplers are connected in series, then when all three are activated, it will pull-down a voltage and release the three converters.

As each of these downstream converters reaches the output voltage level set for that converter, it is important that they phase back their current and not go into an overvoltage shutdown as the output voltage continues to climb (to a certain degree) when the other converters continue to increase the output voltage. Also, as each reaches its maximum current, it has to go into a maximum current limit and also not shut down. This is needed to allow the current-share circuitry time to operate and force load sharing.

Of course, extreme overvoltage should shut down all units. Similarly, if the current is too excessive, the unit should limit the current and shut down after a short delay to prevent damage in the event of an output short.

Another circuit is required to synchronize all converters to the same frequency. Usuall, in a PFC/downstream converter configuration, the PFC is synchronized to the downstream converter. However, since there are three downstream converters, this would require that one be the master and the others be slaves. Since it is also desirable to have each of the PFC/downstream converter combinations be the same, it is recommended that all be synchronized to the internal housekeeping converter, or some multiple of that converter.

References

1. A typical design of a PFC section is described in a Texas Instruments document, "UCC3817 BiCMOS Power Factor Preregulator Evaluation Board (Rev. C) (sluu077c.pdf)" for the UCC3817, click here or go to www.ti.com/sc/device/ucc3817

2. The data sheet on TI's UC3875 has an application section that explains the Phase-Shift Resonant Controller design (UC3875.pdf); click here or go to www.ti.com/sc/device/ucc3875

3. The UCC3895 Advanced Phase Controller Evaluation Board (sluu069a.pdf) shows a design with the second-generation phase-shifted full bridge, click here or go to www.ti.com/sc/device/ucc3895

4. The application section of the UCC39002 by Texas Instruments will provide a description on how to perform this function the current-sharing function, click here or go to www.ti.com/sc/device/ucc39002

About the Author

John Bottrill is a Senior Applications Engineer at Texas Instruments, Inc., Manchester, NH. John supports customers and evaluates new ICs before release. He has produced numerous technical papers and has two patents to his credit. He received his B. Sc. in Electrical Engineering from Queen's University at Kingston, Ontario, Canada.