求助verilog程序交通灯

 我用周公的easy430FPGA actel公司的，编写交通灯程序（该程序是夏宇闻老师书上的）后，前仿真能出现波形，但总是综合失败，望高手指点，程序如下：
// traffic_light.v
module traffic_light(red,h,green,syclk);
    input   syclk;
    output  red,h,green;
    reg     red,h,green,clk;
    reg[31:0]   rt,gt,ht;
    reg[25:0]   count;

    parameter on = 0,off = 1;

    initial red = off;
    initial h = off;
    initial begin green = off;clk = 0 ; count=0;rt = 5;gt = 4;ht = 2; end

    always
        begin
            red = on;
            light(red,rt);
            h = on;
            light(h,ht);
            green = on;
            light(green,gt);
        end


    task    light;
        inout  color;
        input[31:0]   delay_time;
       
        begin
            repeat(delay_time)
                @(posedge   clk);
            color = off;
        end
    endtask

    always  @(posedge   syclk)
        begin
            if(count==26'd12000000)
                begin
                    count = 0;
                    clk = ~clk;
                end
            else
                begin
                    count = count + 1'd1;
                end
        end      

endmodule