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;==============================================================================
; FEELING TECHNOLOGY CORP. ;============================================================================== ;IC : FM8PC71A ;CPUCLK : 1 MHz ;WDT : Disable ;------------------------------------------------------------------------------ ;MODIFY BY : KL Lai ;DATE : 2010-1202 ;VER : 1.00 ;------------------------------------------------------------------------------ #include "F5711_define.ash" #define VOUT PORTB,0 ;PORTB[0] #define REF PORTB,4 ;PORTB[4] #define DIN PORTB,1 ;PORTB[1] #define SCLK PORTB,2 ;PORTB[2] #define CS PORTA,5 ;PORTA[5] SDA_LOW MACRO BCR DIN ENDM SDA_HIGH MACRO BSR DIN ENDM SCL_HIGH MACRO BSR SCLK ENDM SCL_LOW MACRO BCR SCLK ENDM ;===================================================================== ;-------------------------- ROM Areas -------------------------------- ;===================================================================== ORG 000H GOTO reset ORG 003H GOTO int_vector ;--------------------------------------------------------------------- INT_VECTOR: MOVAR INTACCTMP SWAPR STATUS,A MOVAR INTSTATMP ;Push Stack BTRSC intflag,paif_b GOTO paitask ;porta BTRSC intflag,pbif_b GOTO pbitask ;portb BTRSC PWM0CR,P0TMIF_B GOTO PWM0Itask ;PWM0 BTRSC PWM1CR,P1TMIF_B GOTO PWM1Itask ;PWM1 BTRSC PWM2CR,P2TMIF_B GOTO PWM2Itask ;PWM2 BTRSC PWM3CR,P3TMIF_B GOTO PWM3Itask ;PWM3 BTRSC ADCON_2,ADCIF_B GOTO ADCItask ;ADC int_exit: SWAPR INTSTATMP,A ;Pop Stack MOVAR STATUS SWAPR INTACCTMP,R SWAPR INTACCTMP,A RETFIE ;===================================================================== ;------------------ Main Programme Beginning ------------------------- ;===================================================================== ;---------------------------------------------------------------------- ;---------------------------------------------------------------------- Eight_Cycle: goto $+1 goto $+1 RETURN ;===================================================================== ; MARCO ;===================================================================== ;-------------------------For 12MHz------------------------------------ ; Variable : m=Low-byte , n=High-byte ; time = n*256*2us + (m+1)*2us M_12MHz_Delay_us MACRO n,m movia m movar DlyCnt_L movia n movar DlyCnt_M CALL Dec_counter_12MHz ;6 cycles ENDM ;-------------------------------------------------- delay_2us_12MHz: call Eight_Cycle call Eight_Cycle Dec_counter_12MHz: movia 0xFF addar DlyCnt_L,r btrsc status,0 incr DlyCnt_M,r addar DlyCnt_M,r btrsc status,0 goto delay_2us_12MHz ;8 cycles exit_delay_12MHz: ;7 cycles nop ;counter overflow call Eight_Cycle RETURN ;6 + 7 + (1+8) + 2 = 24 cycles ;--------------------------------------------------------------------- ;--------------------------------------------------------------------- ; Variable : n ; Delay Time ~= n*100ms ; パDelay丁耕, ぃ暗弘絋璸衡 M_12MHz_Delay_ms MACRO n movia n movar DlyCnt_H movr DlyCnt_H,A btrsc status,2 goto $+9 ;exit_delay_12MHz_ms ;If counter=0 , exit count ;Dec_counter_12MHz_ms: clrwdt movia 50h movar DlyCnt_L movia C3h movar DlyCnt_M CALL Dec_counter_12MHz ;100ms decrsz DlyCnt_H,R goto $-7 ;Dec_counter_12MHz_ms ;exit_delay_12MHz_ms: ENDM ;===================================================================== ;---------------------------------------------------------------------- ;-------------------------For 24MHz------------------------------------ ; Variable : m=Low-byte , n=High-byte ; Time = n*256*2us + (m+1)*2us M_24MHz_Delay_us MACRO n,m movia m movar DlyCnt_L movia n movar DlyCnt_M CALL Dec_counter_24MHz ;6 cycles ENDM ;-------------------------------------------------- delay_2us_24MHz: call Eight_Cycle call Eight_Cycle call Eight_Cycle call Eight_Cycle call Eight_Cycle Dec_counter_24MHz: movia 0xFF addar DlyCnt_L,r btrsc status,0 incr DlyCnt_M,r addar DlyCnt_M,r btrsc status,0 goto delay_2us_24MHz ;8 cycles exit_delay_24MHz: ;7 cycles nop ;counter overflow call Eight_Cycle call Eight_Cycle call Eight_Cycle call Eight_Cycle RETURN ;6 + 7 + (1+8*4) + 2 = 48 cycles ;--------------------------------------------------------------------- ;--------------------------------------------------------------------- ; Variable : n ; Delay Time ~= n*100ms ; パDelay丁耕, ぃ暗弘絋璸衡 M_24MHz_Delay_ms MACRO n movia n movar DlyCnt_H movr DlyCnt_H,A btrsc status,2 goto $+9 ;exit_delay_24MHz_ms ;If counter=0 , exit count ;Dec_counter_24MHz_ms: clrwdt movia 50h movar DlyCnt_L movia C3h movar DlyCnt_M CALL Dec_counter_24MHz ;100ms decrsz DlyCnt_H,R goto $-7 ;Dec_counter_24MHz_ms ;exit_delay_24MHz_ms: ENDM ;===================================================================== ;===================================================================== reset: clrwdt BCR WDT,WDTE_B ;Disable Watch dog timer nop nop CALL CLEAR_RAM CALL RESET_INIT BTRSS PCON,LVDT24_B GOTO reset MOVIA 00000000B IOST PAMODE0 MOVIA 11111011B IOST PAMODE1 ;PA2 HIGH IS FIRC , LOW IS FOSC M_12MHz_Delay_us 003D,005D CALL ADC_TEST_INIT MAIN_LOOP: NOP NOP GOTO MAIN_LOOP ;===================================================================== ;=================== ADC Testing Start =============================== ;===================================================================== //弧: ICE VREFH = 3V 块 AD5541REF pin竲, 糶Data 0xFFFF, 0xDFFF, // 0xBFFF, 0x9FFF, 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000AD5541 // Vout pin块AIN0, 竒筁ADCRead ADCHB,ADCLBㄓ喷靡ADC琌タ盽, // 璝琌糶Data0xFFFF玥┕玡喷靡2筳8CodeData(0xFF7F,0xFEFF), // ぇゑ耕硂3DataADCHB,ADCLB琌筳6~10codeず, 璝琌絛瞅ず // 玥ボADC琌OK琌絬┦, 璝琌糶Data0x0000玥┕喷靡2筳8 // CodeData(0x007F,0x00FF). //Trigger key : PA3: 匡拒Digital input, 抖0xFFFF, 0xDFFF, 0xBFFF, 0x9FFF, // 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000, 讽程0x0000ぇ // PA3秈笆喷靡家Α, 碞琌ぃノTrigger PA4ㄓ秨﹍喷靡, 稱 // 喷靡ぃDigital input临琌Trigger PA3ㄓ暗ち传. // PA4: 秨﹍喷靡龄. //喷靡秈︽いの挡狦: PB3=1, PB5=0ボタ喷靡い, PB3=0, PB5=0ボ喷靡挡挡狦岿粇, // PB3=0, PB5=1ボ喷靡挡挡狦タ絋 ADC_TEST_INIT: MOVIA 00100000B IOST PAMODE0 MOVIA 11111111B //PA5 as output IOST PAMODE1 MOVIA 00101110B IOST PBMODE0 MOVIA 11101110B //PB1,2,3,5 as output IOST PBMODE1 MOVIA 0FFH MOVAR PORTA MOVIA 0FEH MOVAR PORTB BCR ADCON_1,CHSEL0_B //Input Channel is PB0 BCR ADCON_1,CHSEL1_B BCR ADCON_1,CHSEL2_B BSR ADCON_1,ADCSR0_B BSR ADCON_1,ADCSR1_B //ADC clock is Fcpu BSR ADCON_2,SVREFH_B //External VREFH (PB4) //BCR ADCON_2,SVREFH_B //Internal voltage BCR ADCON_2,ADCNT_B //Trigger mode //BSR ADCON_2,ADCNT_B //Contiune mode BCR ADCON_2,DACOEN_B //Disable DAC output to PB3 BSR ADCON_2,ADCTMS_B //Fixed convert timing BCR ADCON_2,SELVER0_B BSR ADCON_2,SELVER1_B //VREFH = 3V MOVIA 00000000B IOST ADCON_3 //12 bits MOVIA 11111100B IOST ADCON_4 //T1 = 4 cycles, T2 = 4 cycles, T3 = 4 cycles BCR PORTB,5 //ADC OK BCR PORTB,3 //Testing ADC BSR ADCON_1,ADCEN_B //Enable ADC CLRR DACHB_REG CLRR DACLB_REG CLRR SEL_DIGITAL_IN INCR SEL_DIGITAL_IN,R MOVIA 0FFH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG //Default MOVAR DACLB_REAL CALL TX_DAC_DATA TRIGGER_LOOP: BSR PORTA,3 BSR PORTA,4 NOP NOP //BTRSS ADCON_2,ADCIF_B //GOTO $-1 //BCR ADCON_2,ADCIF_B NOP NOP NOP NOP BTRSS PORTA,3 GOTO SELECT_DIGITAL_INPUT BTRSC ADCON_2,ADCNT_B //Contiune mode GOTO Continue_ADC BTRSS PORTA,4 GOTO Trigger_ADC GOTO TRIGGER_LOOP ;----------------------------------------------------------- SELECT_DIGITAL_INPUT: BSR PORTB,5 BSR PORTB,3 M_12MHz_Delay_us 020D,000D BCR PORTB,5 BCR PORTB,3 BSR PORTA,3 BTRSS PORTA,3 GOTO $-1 MOVR SEL_DIGITAL_IN,A ADDAR PCL,R GOTO DATA_FFFF GOTO DATA_DFFF GOTO DATA_BFFF GOTO DATA_9FFF GOTO DATA_7FFF GOTO DATA_5FFF GOTO DATA_3FFF GOTO DATA_1FFF GOTO DATA_0000 GOTO CHANGE_MODE DATA_FFFF: MOVIA 0FFH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_DFFF: MOVIA 0DFH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_BFFF: MOVIA 0BFH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_9FFF: MOVIA 09FH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_7FFF: MOVIA 07FH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_5FFF: MOVIA 05FH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_3FFF: MOVIA 03FH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_1FFF: MOVIA 01FH MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 0FFH MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R GOTO WAIT_KEY_RELEASE DATA_0000: MOVIA 000H MOVAR DACHB_REG MOVAR DACHB_REAL MOVIA 000H MOVAR DACLB_REG MOVAR DACLB_REAL CALL TX_DAC_DATA INCR SEL_DIGITAL_IN,R WAIT_KEY_RELEASE: M_12MHz_Delay_us 040D,000D BSR PORTA,3 BTRSS PORTA,3 //Trigger key GOTO $-1 M_12MHz_Delay_us 010D,000D GOTO TRIGGER_LOOP CHANGE_MODE: MOVIA 010H XORAR ADCON_2,R //Contiune mode / Trigger mode CLRR SEL_DIGITAL_IN GOTO WAIT_KEY_RELEASE ;----------------------------------------------------------- Trigger_ADC: BSR PORTB,5 BSR PORTB,3 M_12MHz_Delay_us 020D,000D BCR PORTB,5 BCR PORTB,3 BSR PORTA,4 BTRSS PORTA,4 //Trigger key GOTO $-1 Continue_ADC: BCR PORTB,5 //ADC OK BSR PORTB,3 //Testing ADC MOVR DACHB_REAL,A MOVAR DACHB_REG MOVR DACLB_REAL,A MOVAR DACLB_REG CALL TX_DAC_DATA M_12MHz_Delay_us 060D,00D BSR ADCON_1,ADCST_B //Start to ADC sample,When ADC conversion has //been completed, this start be clear to 0 by H/W BTRSC ADCON_1,ADCST_B //Waiting complete GOTO $-1 MOVR DACHB_REAL,A BTRSS STATUS,2 GOTO $+4 MOVR DACLB_REAL,A BTRSC STATUS,2 GOTO SAVE_TO_LOW MOVR ADCHB,A MOVAR ADCHB_TEMP_H MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_H //GOTO Trigger_ADC_1 Trigger_ADC_1: ;----------------------------------------------------------- ;糶畉禯8codedataADCADCHB_TEMP_M, ADCLB_TEMP_M M_12MHz_Delay_us 060D,000D ;MOVR DACHB_REG,A ;BTRSS STATUS,2 ;GOTO $+4 ;MOVR DACLB_REG,A ;BTRSC STATUS,2 ;GOTO ADC_DATA_ZERO MOVIA 07FH ANDAR DACLB_REG,R CALL TX_DAC_DATA M_12MHz_Delay_us 060D,00D BSR ADCON_1,ADCST_B //Start to ADC sample,When ADC conversion has //been completed, this start be clear to 0 by H/W BTRSC ADCON_1,ADCST_B //Waiting complete GOTO $-1 MOVR ADCHB,A MOVAR ADCHB_TEMP_M MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_M ;----------------------------------------------------------- ;糶畉禯8codedataADCADCHB_TEMP_L, ADCLB_TEMP_L M_12MHz_Delay_us 060D,000D DECR DACHB_REG,R MOVIA 080H ADDAR DACLB_REG,R CALL TX_DAC_DATA M_12MHz_Delay_us 060D,00D BSR ADCON_1,ADCST_B //Start to ADC sample,When ADC conversion has //been completed, this start be clear to 0 by H/W BTRSC ADCON_1,ADCST_B //Waiting complete GOTO $-1 MOVR ADCHB,A MOVAR ADCHB_TEMP_L MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_L ;----------------------------------------------------------- BCR PORTB,3 //Testing ADC GOTO COMPARE_ADC_MDATA ;----------------------------------------------------------- SAVE_TO_LOW: MOVR ADCHB,A MOVAR ADCHB_TEMP_L MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_L //GOTO ADC_DATA_ZERO ADC_DATA_ZERO: ;糶畉禯8codedataADCADCHB_TEMP_M, ADCLB_TEMP_M M_12MHz_Delay_us 060D,000D MOVIA 07FH ADDAR DACLB_REG,R CALL TX_DAC_DATA M_12MHz_Delay_us 060D,000D BSR ADCON_1,ADCST_B //Start to ADC sample,When ADC conversion has //been completed, this start be clear to 0 by H/W BTRSC ADCON_1,ADCST_B //Waiting complete GOTO $-1 MOVR ADCHB,A MOVAR ADCHB_TEMP_M MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_M ;----------------------------------------------------------- ;糶畉禯8codedataADCADCHB_TEMP_H, ADCLB_TEMP_H M_12MHz_Delay_us 060D,000D MOVIA 080H ADDAR DACLB_REG,R CALL TX_DAC_DATA M_12MHz_Delay_us 060D,000D BSR ADCON_1,ADCST_B //Start to ADC sample,When ADC conversion has //been completed, this start be clear to 0 by H/W BTRSC ADCON_1,ADCST_B //Waiting complete GOTO $-1 MOVR ADCHB,A MOVAR ADCHB_TEMP_H MOVR ADCLB,A ANDIA 00FH MOVAR ADCLB_TEMP_H BCR PORTB,3 //Testing ADC GOTO COMPARE_ADC_MDATA ;----------------------------------------------------------- COMPARE_ADC_MDATA: MOVIA 005H MOVAR DEC_CNT MOVIA 005H MOVAR RANGE_CNT MOVR ADCHB_TEMP_H,A MOVAR ADCHB_TEMP MOVR ADCLB_TEMP_H,A MOVAR ADCLB_TEMP DEC_SIX_CODE_LOOP_M: CALL DEC_1_12BIT DECRSZ DEC_CNT,R GOTO DEC_SIX_CODE_LOOP_M DEC_SIX_CODE_END_M: CALL DEC_1_12BIT MOVIA 00FH ANDAR ADCLB_TEMP,R MOVR ADCHB_TEMP_M,A XORAR ADCHB_TEMP,A BTRSS STATUS,2 GOTO DEC_RANGE_CNT_M MOVR ADCLB_TEMP_M,A XORAR ADCLB_TEMP,A BTRSC STATUS,2 GOTO COMPARE_ADC_LDATA DEC_RANGE_CNT_M: DECRSZ RANGE_CNT,R GOTO DEC_SIX_CODE_END_M GOTO ADC_ERR ;----------------------------------------------------------- COMPARE_ADC_LDATA: MOVIA 005H MOVAR DEC_CNT MOVIA 005H MOVAR RANGE_CNT MOVR ADCHB_TEMP_M,A MOVAR ADCHB_TEMP MOVR ADCLB_TEMP_M,A MOVAR ADCLB_TEMP DEC_SIX_CODE_LOOP_L: CALL DEC_1_12BIT DECRSZ DEC_CNT,R GOTO DEC_SIX_CODE_LOOP_L DEC_SIX_CODE_END_L: CALL DEC_1_12BIT MOVIA 00FH ANDAR ADCLB_TEMP,R MOVR ADCHB_TEMP_L,A XORAR ADCHB_TEMP,A BTRSS STATUS,2 GOTO DEC_RANGE_CNT_L MOVR ADCLB_TEMP_L,A XORAR ADCLB_TEMP,A BTRSC STATUS,2 GOTO ADC_OK DEC_RANGE_CNT_L: DECRSZ RANGE_CNT,R GOTO DEC_SIX_CODE_END_L GOTO ADC_ERR ;----------------------------------------------------------- ADC_ERR: BCR PORTB,5 BTRSS ADCON_2,ADCNT_B //Contiune mode GOTO TRIGGER_LOOP M_12MHz_Delay_us 050D,000D GOTO TRIGGER_LOOP ADC_OK: BSR PORTB,5 BTRSS ADCON_2,ADCNT_B //Contiune mode GOTO TRIGGER_LOOP M_12MHz_Delay_us 050D,000D GOTO TRIGGER_LOOP DEC_1_12BIT: MOVIA 00FH ANDAR ADCLB_TEMP,R MOVIA 0FFH ADDAR ADCLB_TEMP,R BTRSC STATUS,0 INCR ADCHB_TEMP,R ADDAR ADCHB_TEMP,R RETURN ;===================================================================== TX_DAC_DATA: BCR CS // start the data writed to ad5541 MOVR DACHB_REG,A CALL TX_AD5541 MOVR DACLB_REG,A CALL TX_AD5541 BSR CS // stop write and change the daco RETURN ;===================================================================== ;=================== ADC Testing End ================================= ;===================================================================== ;===================================================================== ;===================================================================== paitask: BCR INTFLAG,PAIF_B MOVIA 0FFH MOVAR PORTA //INCR PORT_INT_CNT,R ;Increase counter //BCR INTFLAG,PAIF_B GOTO int_exit pbitask: BCR INTFLAG,PBIF_B MOVIA 0FFH MOVAR PORTB //INCR PORT_INT_CNT,R ;Increase counter //BCR INTFLAG,PBIF_B GOTO int_exit PWM0Itask: BCR PWM0CR,P0TMIF_B //INCR PORT_INT_CNT,R ;Increase counter GOTO int_exit PWM1Itask: BCR PWM1CR,P0TMIF_B //INCR PORT_INT_CNT,R ;Increase counter GOTO int_exit PWM2Itask: BCR PWM2CR,P2TMIF_B //INCR PORT_INT_CNT,R ;Increase counter GOTO int_exit PWM3Itask: BCR PWM3CR,P3TMIF_B //INCR PORT_INT_CNT,R ;Increase counter GOTO int_exit ADCItask: BCR ADCON_2,ADCIF_B //INCR PORT_INT_CNT,R ;Increase counter GOTO int_exit ;===================================================================== ;===================================================================== CLEAR_RAM: MOVIA 040H MOVAR FSR CLEAR_LOOP: CLRR INDF MOVIA 07FH XORAR FSR,A BTRSC STATUS,Z_B RETURN INCR FSR,R GOTO CLEAR_LOOP ;===================================================================== ;===================================================================== RESET_INIT: CLRR INTEN CLRR INTFLAG CLRR PAIE CLRR PBIE //BCR CLKCFG,SIRCEN_B ;Disable slow IRC clock BSR CLKCFG,IRCEN_B ;Enable internal clock RETURN ;===================================================================== ;===================================================================== ;--------------------------------------; ;--- TX_out Subroutine ---; ;--------------------------------------; TX_AD5541: //if TEST_ITEM=1 MOVAR OutputByte SCL_LOW MOVIA 08 MOVAR GenCount RRR OutputByte,R // shift right in preparation for next loop //endif Bit_Out: //if TEST_ITEM=1 RLR OutputByte,R // shift bits out of buffer BTRSC OutputByte, 7 // send current "bit 7" GOTO Bit_High M_12MHz_Delay_us 000D,002D //M_uS_1 SDA_LOW // Transmit data bit is Low GOTO Clock_Out //endif Bit_High: //if TEST_ITEM=1 M_12MHz_Delay_us 000D,002D //M_uS_1 SDA_HIGH // Transmit data bit is High //endif Clock_Out: //if TEST_ITEM=1 M_12MHz_Delay_us 000D,002D //M_uS_1 SCL_HIGH // pull clock high after sending bit M_12MHz_Delay_us 000D,002D //M_uS_1 SCL_LOW //pull clock line low DECRSZ GenCount,R GOTO Bit_Out M_12MHz_Delay_us 000D,002D //M_uS_1 RETURN //endif ;===================================================================== ;===================================================================== 
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顶下
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好好好好好。上面的好就是看不懂
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/6 
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