[问答]

esp32从开发模式的加密状态恢复到解密状态失败了怎么解决？

问答对人有帮助，内容完整，我也想知道答案 0 我这里按照关闭flash加密的操作步骤，关闭配置菜单的Enable flash encryption on boot (READ DOCS FIRST)项目，重新编译并烧写。运行espefuse.py burn_efuse FLASH_CRYPT_CNT命令，结果失败了 espefuse.py v4.5.1 Connecting....... Detecting chip type... Unsupported detection protocol, switching and trying again... Connecting.... Detecting chip type... ESP32 === Run "burn_efuse" command === The efuses to burn: from BLOCK0 - FLASH_CRYPT_CNT Burning efuses: - 'FLASH_CRYPT_CNT' (Flash encryption mode counter) 0b0000001 -> 0b0000011 Check all blocks for burn... idx, BLOCK_NAME, Conclusion [00] BLOCK0 is not empty (written ): 0x00000344f0100000000006340000a200009324d7eb5d08d400110080 (to write): 0x00000000000000000000000000000000000000000000000000300000 (coding scheme = NONE) . This is an irreversible operation! Type 'BURN' (all capitals) to continue. 运行espefuse.py -p COM6 summary查看状态如下 === Run "summary" command === EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value) ---------------------------------------------------------------------------------------- Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1142 R/W (0b00110) Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 52 R/W (0x34) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0) Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0) Identity fuses: MAC (BLOCK0): Factory MAC Address = 24:d7:eb:5d:08:d4 (CRC 0x93 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 147 R/W (0x93) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = True R/W (0b1) WAFER_VERSION_MINOR (BLOCK0): WAFER VERSION MINOR = 0 R/W (0b00) CHIP_PACKAGE (BLOCK0): Chip package identifier = 1 R/W (0b001) CHIP_PACKAGE_4BIT (BLOCK0): Chip package identifier #4bit = 0 R/W (0b0) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00) WAFER_VERSION_MAJOR (BLOCK0): calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CH = 3 R/W (0b011) IP_VER_REV2 and apb_ctl_date (read only) PKG_VERSION (BLOCK0): calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_ = 1 R/W (0x1) PACKAGE (read only) Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 1 R/W (0b0000001) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = False R/W (0b0) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W Flash voltage (VDD_SDIO) determined by GPIO12 on reset 看起来是FLASH_CRYPT_CNT被写保护，但是我看文档默认是未写保护的，我这里按照flash_encryption示例程序做的，应该没有操作过写保护，我的操作哪里有问题么？ 0
2024-6-11 08:16:42　　评论淘帖0 邀请回答您可以邀请以下用户，快速回答问题 × hgimtk 该类别下有 38 个回答。邀请回答 wang21cj 该类别下有 38 个回答。邀请回答新星之火12138 该类别下有 33 个回答。邀请回答 zyh34997 该类别下有 32 个回答。邀请回答就好国dd 该类别下有 32 个回答。邀请回答 chm5 该类别下有 32 个回答。邀请回答 heks 该类别下有 31 个回答。邀请回答 zaichenxi 该类别下有 31 个回答。邀请回答 flowerddd 该类别下有 29 个回答。邀请回答 muwersddg 该类别下有 29 个回答。邀请回答四川赵赵该类别下有 29 个回答。邀请回答 vinww特烦恼该类别下有 28 个回答。邀请回答星星公交站该类别下有 28 个回答。邀请回答 caosurround 该类别下有 28 个回答。邀请回答 overheat 该类别下有 27 个回答。邀请回答 gvjhvbc 该类别下有 27 个回答。邀请回答安德森大该类别下有 27 个回答。邀请回答 xwgc888 该类别下有 27 个回答。邀请回答 lkjflksjfsa 该类别下有 27 个回答。邀请回答 h1654155143.8331 该类别下有 27 个回答。邀请回答举报莫联雪相关推荐 • 请问ESP32-C3如何从Deep Sleep状态回到正常工作状态？ 429 • ESP32如何解除flash加密？ 932 • 请问如何配置烧录选项或者将Flash8线模式恢复到4线模式呢？ 416 • esp32s3 N8R8 efuse打开外置Flash 8线模式后固件校验失败，如何配置烧录选项？ 539 • esp32s3 N8R8 efuse打开外置Flash 8线模式后固件校验失败的原因？怎么处理？ 445 • windowns环境下esp32c3如何解除flash加密？ 569 • 是否有其他方法检测加密flash闪存扇区是否处于已擦除/未写入状态？ 488 • windowns环境下esp32c3如何解除flash加密？ 386 • windowns环境下esp32c3如何解除flash加密？ 794 • 求助，关于ESP32C3模块与手机蓝牙兼容性问题求解 513 2个回答

答案对人有帮助，有参考价值 0 请根据 ·espefuse.py burn_efuse FLASH_CRYPT_CNT` 后的提示输入“BURN”以确认烧录。

2024-6-11 10:09:02 评论举报刘继牛

答案对人有帮助，有参考价值 0 以下是一些建议和解决方案： 1. 确保您使用的是最新版本的esptool.py。您可以通过以下命令来更新esptool.py： ``` pip install --upgrade esptool ``` 2. 确保您的ESP32设备连接正确，并且已经进入下载模式。您可以通过按下BOOT按钮并同时给设备供电来进入下载模式。 3. 检查您的USB端口和数据线是否正常工作。如果可能，请尝试使用其他USB端口或数据线。 4. 确保您已经正确设置了烧录配置。在烧录前，请检查您的烧录配置文件（如platformio.ini），确保以下设置正确： ``` [env:您的设备型号] platform = espressif32 board = 您的设备型号 framework = arduino ``` 5. 在烧录过程中，确保您使用了正确的烧录命令。关闭Flash加密的命令应该是： ``` espefuse.py --port COMx burn_efuse ```

2024-6-11 17:08:10 评论举报好名字