FM0+ S6E1C-Series Starter Kit开发板，I2SL0口通过中断读取出的数据始终为0，播放音频可以是怎么回事？

428 开发板中断

问答对人有帮助，内容完整，我也想知道答案 0 / ************************************************************************** brief I2S RX FIFO callback function ****************************************************************************/ void I2sRxIrqCallback(void) { uint8_t u8i,rxlen; uint32_t data; rxlen = I2sl_GetFifoCount( I2slCh,I2slFifo2); for(u8i=0;u8i= 1024) if(rxindex >= 60000) { bPlaySoundActive = FALSE; I2sl_DisableClockOut( I2slCh); // Disable I2S Clock out I2sl_DisableIrq( I2slCh, I2slRxFifoIrq); // Disable TX FIFO interrupt break; } } } /************************************************************************** brief I2S_mic_Start set the wm8731 register and the I2SL0 register. Start the microphone function. *****************************************************************************/ void I2S_mic_Start() { stc_i2sl_config_t stcI2slConfig; stc_wm8731_reg_t stcWm8731Reg; stc_i2sl_irq_cb_t stcI2sIrqCb; // Clear strcutures PDL_ZERO_STRUCT(stcI2slConfig); PDL_ZERO_STRUCT(stcWm8731Reg); // Initialize I2S IO, I2C IO InitI2slIo(); InitI2cIo() // Initialize interrupts stcI2sIrqCb.pfnTxFifoIrqCb = I2sTxIrqCallback; stcI2sIrqCb.pfnRxFifoIrqCb = I2sRxIrqCallback; // Initialize I2S-Lite stcI2slConfig.enClkIn = I2slUsePclk; // Use PCLK as I2SCK source clock stcI2slConfig.u8ClkInDiv = I2SL_CLK_DIV; // I2SMCK = 40/(22) = 10MHz, I2SCLK = 10MHz/4 = 2.5MHz // stcI2slConfig.bClkOutputEn = TRUE; // Disable I2SMCLK output stcI2slConfig.bClkOutputEn = FALSE; // Disable I2SMCLK output stcI2slConfig.enTransferMode = I2slPhilipsMode; // Philips standard mode // stcI2slConfig.bDataOutput = TRUE; /////< FALSE: data is received via I2S-Lite, TRUE: data is transferred via I2S-Lite stcI2slConfig.bDataOutput = FALSE; /////< FALSE: data is received via I2S-Lite, TRUE: data is transferred via I2S-Lite stcI2slConfig.bCkWsOutputEn = TRUE; // I2SCK, I2SWS outpue enable stcI2slConfig.bI2sWsPolarity = FALSE; // WS low level for left channel stcI2slConfig.bMaskBitOutput = 0; // Mask bit set to 1 for invalid frame stcI2slConfig.enFrameLength = I2slFrame32Bit; // I2slFrame32Bit; // 32-bit data frame, I2SCLK = 11.25MHz/4 = 2.812MHz stcI2slConfig.enFifoWidth = I2slFifoWidth32Bit; // 32-bit FIFO access width stcI2slConfig.enFifoSel = I2slTxFifo1RxFifo2; // FIFO1: TX, FIFO2: RX stcI2slConfig.u8ByteCount1 = 0; // Clear FIFO count // stcI2slConfig.u8ByteCount2 = 0; // Clear FIFO count stcI2slConfig.u8ByteCount2 = 16; // Transfer data count for FIFO2 stcI2slConfig.pstcI2slIrqCb = stcI2sIrqCb; // Set interrupt callback stcI2slConfig.bTouchNvic = TRUE; // Enable NVIC // Initialize codec // Reset register stcWm8731Reg.RESET = 0x00u; // Reset WM8731 // Left right line input stcWm8731Reg.LLIN_f.LINVOL = 0x1Fu; // Left channel line input volume: 0dB stcWm8731Reg.LLIN_f.LINMUTE = 1u; // Enable left channel line input mute stcWm8731Reg.LLIN_f.LRINBOTH = 0u; // Disable simultaneous input volume and mute load from left to right stcWm8731Reg.RLIN_f.RINVOL = 0x1Fu; // Right channel line input volume 0dB stcWm8731Reg.RLIN_f.RINMUTE = 1u; // Enable right channel line input mute stcWm8731Reg.RLIN_f.RINBOTH = 0u; // Disable simultaneous input volume and mute load from right to left // Left right headphone output stcWm8731Reg.LHOUT_f.LHPVOL = 0x1F; // Set volume of left headphone to 0dB. 0x30(-73dB) ~ 0x7F(+6dB), 0 ~ 0x2F: mute stcWm8731Reg.LHOUT_f.LZCEN = 0u; // Disable left channel zero cross detect stcWm8731Reg.LHOUT_f.LRHPBOTH = 0u; // Disable simultaneous output volume and mute load from left to right stcWm8731Reg.RHOUT_f.RHPVOL = 0x1F; // Set volume of right headphone to 0dB. 0x30(-73dB) ~ 0x7F(+6dB), 0 ~ 0x2F: mute stcWm8731Reg.RHOUT_f.RZCEN = 0u; // Enable right channel zero cross detect stcWm8731Reg.RHOUT_f.RLHPBOTH = 0u; // Disable simultaneous output volume and mute load from right to left // Analog audio path control stcWm8731Reg.AAPC_f.MICBOOST = 1u; // Enable boost stcWm8731Reg.AAPC_f.MUTEMIC = 0u; // Enable mute to ADC stcWm8731Reg.AAPC_f.INSEL = 1u; // microphone input select to ADC // stcWm8731Reg.AAPC_f.INSEL = 0u; // linein input select to ADC stcWm8731Reg.AAPC_f.BYPASS = 0u; // Disable bypass stcWm8731Reg.AAPC_f.DACSEL = 1u; // Select DAC stcWm8731Reg.AAPC_f.SIDETONE = 1u; // Enable side tone stcWm8731Reg.AAPC_f.SIDEATT = 0u; // 0: -6dB, 1: -12dB, 2: -9dB, 3: -15dB. // Digital audio path control stcWm8731Reg.DAPC_f.ADCHPD = 0u; // Enable high pass filter stcWm8731Reg.DAPC_f.DEEMP = 3u; // De-emphasis contrl. 0: disable, 1: 32kHz, 2: 44.1kHz, 3: 48kHz stcWm8731Reg.DAPC_f.DACMU = 0u; // Disable soft mute stcWm8731Reg.DAPC_f.HPOR = 0u; // Clear offset when high pass // Power down control stcWm8731Reg.PDC_f.LINEINPD = 0u; // Disable line input power down stcWm8731Reg.PDC_f.MICPD = 0u; // Disable microphone input power down // stcWm8731Reg.PDC_f.MICPD = 1u; // Disable microphone input power down stcWm8731Reg.PDC_f.ADCPD = 0u; // Disable ADC power down stcWm8731Reg.PDC_f.DACPD = 0u; // Disable DAC power down // stcWm8731Reg.PDC_f.DACPD = 1u; // Disable DAC power down stcWm8731Reg.PDC_f.OUTPD = 0u; // Disable output power down stcWm8731Reg.PDC_f.OSCPD = 0u; // Disable oscillator power down stcWm8731Reg.PDC_f.CLKOUTPD = 0u; // Disable CLKOUT power down stcWm8731Reg.PDC_f.POWEROFF = 0u; // Disable power off mode // Digital audio interface format stcWm8731Reg.DAIF_f.FORMAT = 1u; // 0: MSB-First, right justified, 1: MSB-first, left justified, 2: I2S-format, 3: DSP mode stcWm8731Reg.DAIF_f.IWL = 0u; // 0: 16 bits, 1: 20 bits, 2: 24 bits, 3: 32 bits stcWm8731Reg.DAIF_f.LRP = 0u; // 1: right channel DAC data when DACLRC (WS) is high, 0: right channel DAC data when DACLRC (WS) is low stcWm8731Reg.DAIF_f.LRSWAP = 0u; // 1: swap left channel and right channel, 0: don't swap stcWm8731Reg.DAIF_f.MS = 0u; // 1: Enable master mode, 0: Enable slave mode stcWm8731Reg.DAIF_f.BCLKINV = 0u; // Don't invert BCLK // Sampling control stcWm8731Reg.SC_f.NORMAL_USB = 0u; // 0: normal mode, 1: USB mode stcWm8731Reg.SC_f.BOSR = 0u; // Nomrmal mode: 0: 256fs, 1: 384fs // USB mode: 0: 250fs, 1:272fs stcWm8731Reg.SC_f.SR = 0u; // Sample rate setting stcWm8731Reg.SC_f.CLKDIV2 = 0u; // 0: core clock is MCLK, 1: core clock is MCLK divided by 2 stcWm8731Reg.SC_f.CLKODIV2 = 0u; // 0: output clock is core clock, 1: core clock is core clock/2 // Active control stcWm8731Reg.AC_f.ACTIVE = 1u; // 0: inactive, 1: active if (Ok != Wm8731_Init(I2cCh, stcWm8731Reg)) // Initialize WM8731 via I2C { while(1); //If initialization of the WM8731 CODEC fails, trap execution here. } Wm8731_SetHpVolume(0x7F,0x7F); //0x2F-MUTE ~ 0x7F Maximum I2sl_Init( I2slCh, stcI2slConfig); //initializes an I2S module I2sl_Start( I2slCh); // start I2S, enable i2s clock generate pu16SoundData = au16PixieDustSoundI2s[0]; bPlaySoundActive = TRUE; rxindex = 0; rxvldcnt = 0; I2sl_EnableClockOut( I2slCh); // Enable I2S Clock out I2sl_EnableIrq( I2slCh, I2slTxFifoIrq); // Enable TX FIFO interrupt I2sl_EnableIrq( I2slCh, I2slRxFifoIrq); // Enable RX FIFO interrupt } 0 本主题由 Harmony技术专家于 2024-2-21 15:30 审核通过
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答案对人有帮助，有参考价值 0 例程里面初始化管脚时少写了SetPinFunc_MI2SDI4_1();

2024-2-21 14:56:39 评论举报任黎平