萌新正在写关于数码管显示的verilog代码

warning主要有两个:
01.NUM_PARALLEL_PROCESSORS值过大，软件建议修改为合理范围的值；
02.引脚分配未完成。Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details。

Critical Warning主要有两个：
01.缺少引脚约束文件'test_hex6.sdc'。
02.时序约束不满足。（可能由以上三点导致）

//----------关于仿真
01.功能仿真不需要引脚约束，不涉及时序管理；
02.时序仿真需要对引脚分配，还涉及时序管理分析。
03.我这边只进行了功能仿真，验证程序没有问题。但是实际使用的时候有一点要注意，就是人眼的分辨率不能识别1kHz的刷新频率，所以我后面将代码改成了10分频。
//----------关于结果
01.“用modelsim仿真看波形也没问题”:功能仿真正常，代码没有逻辑缺陷，可以正常使用；
02.“可是我全编译后出现如图所示的警告，烧到板子上结果也不对”：结果不对可能是多个原因
02-a.是涉及的IO没有分配而无法对外输出/对内输入而缺少逻辑控制；
02-b.代码说明数码管是共阳数码管，对此应检查硬件是否匹配；另外就是确定晶振等硬件是否工作正常。
02-c.原代码中数码管刷新频率1kHz过高，人眼不易识别，导致看到的结果全部是“8”。此时建议降低分频频率/刷新频率，我将代码改成了10Hz。

警告图被压了，全编译的警告如下
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.

还有以下的Critical Warning：
Critical Warning (332012): Synopsys Design Constraints File file not found: 'test_hex6.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.

Critical Warning (332012): Synopsys Design Constraints File file not found: 'test_hex6.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.

Critical Warning (332148): Timing requirements not met
        Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.

Critical Warning (332148): Timing requirements not met
        Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.

Critical Warning (332148): Timing requirements not met
        Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.