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1.https://www.cnblogs.com/blogs-of-lxl/p/5887047.html 2.http://blog.csdn.net/lizuobin2/article/details/52471629 环境: Ubuntu 16.04 LTS + gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) + u-boot-2016.09.tar.bz2 先上成果 最终源码见文章末尾。在上一篇的基础上 [经验分享]移植uboot2016.09到jz2440v3——(一)新建单板 接着移植,移植思路如下: 1.start.S文件中添加时钟配置 2.smdk2440.c中注释掉原来的时钟配置,并修改机器码 3.配置SDRAM 4.支持nor flash 5.支持nand flash 在支持nand flash 时,用了比较长的时间理解uboot对s3c2440寄存器的配置过程,在这里贴出修改后的源码,方便坛友参考第二篇博文http://blog.csdn.net/lizuobin2/article/details/52471629理解学习。 diff -uprN ./u-boot-2016.09-with2440/drivers/mtd/nand/s3c2410_nand.c ./u-boot-2016.09-with2440-serial-nor-nand/drivers/mtd/nand/s3c2410_nand.c --- ./u-boot-2016.09-with2440/drivers/mtd/nand/s3c2410_nand.c 2016-09-12 22:05:51.000000000 +0800 +++ ./u-boot-2016.09-with2440-serial-nor-nand/drivers/mtd/nand/s3c2410_nand.c 2017-12-01 10:51:12.615940000 +0800 @@ -20,8 +20,13 @@ #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) +#ifdef CONFIG_S3C2440 +#define S3C2440_ADDR_NALE 8 +#define S3C2440_ADDR_NCLE 12 +#else #define S3C2410_ADDR_NALE 4 #define S3C2410_ADDR_NCLE 8 +#endif #ifdef CONFIG_NAND_SPL @@ -45,6 +50,41 @@ static void s3c24x0_hwcontrol(struct mtd debug("hwcontrol(): 0x%02x 0x%02xn", cmd, ctrl); +#ifdef CONFIG_S3C2440 +/* +*cle :command line enable +*ale:address line enable +*reg offest: 0 4 8 12 16 20 24 28 32 36 +*s3c2410 : nfconf; nfcmd; nfaddr; nfdata; +*s3c2440 : nfconf; nfcont; nfcmd; nfaddr; nfdata; +*ctrl : +* !NAND_CLE , S3C2410_ADDR_NCLE == 8 ->address +* !NAND_ALE , S3C2410_ADDR_NALE == 4 ->command +* (!NAND_CLE) | (!NAND_ALE) 8 | 4 == 12 ->data +*/ + + /*nand flash reg offest set*/ + if (ctrl & NAND_CTRL_CHANGE) { + ulong IO_ADDR_W = (ulong)nand; + + if (!(ctrl & NAND_CLE)) + IO_ADDR_W |= S3C2440_ADDR_NCLE; + if (!(ctrl & NAND_ALE)) + IO_ADDR_W |= S3C2440_ADDR_NALE; + if((!(ctrl & NAND_CLE)) && (!(ctrl & NAND_ALE))) + IO_ADDR_W = IO_ADDR_W + 4; + + chip->IO_ADDR_W = (void *)IO_ADDR_W; + + /*nand chip select set or unset*/ + if (ctrl & NAND_NCE) + writel(readl(&nand->nfcont) & ~(1<<1), + &nand->nfcont); + else + writel(readl(&nand->nfcont) | (1<<1), + &nand->nfcont); + } +#else if (ctrl & NAND_CTRL_CHANGE) { ulong IO_ADDR_W = (ulong)nand; @@ -62,11 +102,11 @@ static void s3c24x0_hwcontrol(struct mtd writel(readl(&nand->nfconf) | S3C2410_NFCONF_nFCE, &nand->nfconf); } +#endif/* CONFIG_S3C2440 */ if (cmd != NAND_CMD_NONE) writeb(cmd, chip->IO_ADDR_W); } - static int s3c24x0_dev_ready(struct mtd_info *mtd) { struct s3c24x0_nand *nand = s3c24x0_get_base_nand(); @@ -117,24 +157,32 @@ int board_nand_init(struct nand_chip *na debug("board_nand_init()n"); - writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon); + writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);/*enable nandflash clock*/ /* initialize hardware */ -#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING) +#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING) /* undefined */ tacls = CONFIG_S3C24XX_TACLS; twrph0 = CONFIG_S3C24XX_TWRPH0; twrph1 = CONFIG_S3C24XX_TWRPH1; -#else +#else /* CONFIG_S3C24XX_CUSTOM_NAND_TIMING is not defined,do this branch */ tacls = 4; twrph0 = 8; twrph1 = 8; + #endif - cfg = S3C2410_NFCONF_EN; - cfg |= S3C2410_NFCONF_TACLS(tacls - 1); - cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); - cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); - writel(cfg, &nand_reg->nfconf); +// cfg = S3C2410_NFCONF_EN; +// cfg |= S3C2410_NFCONF_TACLS(tacls - 1); +// cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); +// cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); +// writel(cfg, &nand_reg->nfconf); + + /* set timing */ + cfg = (0<<12)|(4<<8)|(2<<4); + writel(cfg, &nand_reg->nfconf); + /* initialize ECC,enable nandflash control reg ,enable select chip */ + cfg = (1<<4)|(0<<1)|(1<<0); + writel(cfg, &nand_reg->nfcont); /* initialize nand_chip data structure */ nand->IO_ADDR_R = (void *)&nand_reg->nfdata; 其他细节的修改见补丁,这个补丁是相对于u-boot-2016.09.tar.bz2制作的。 |
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