如何在18F2620中模拟SPI主机

设置一个简单的输出例程，将MSSP设置为SPI主控器。从18F2620规范表中获取代码片段非常正确。顺序：将输出管脚LOW设置为目标SS*信号。用字节数据加载SSPBUF reg。（这应该启动一个SPI输出周期）在SSPSTAT中观察BF位直到它到达1。（即发送周期已经完成。）旋转BF位，直到它变高。读取SSPBUF reg，以便为下一个周期清除BF位，丢弃数据。将SS*的输出引脚设置回HIGH。稍等（测试代码等待40mSec）并重复循环。问题：MPLAB SIM从不设置比特。代码一直在旋转，等待SSPSTAT中的BF位变高。有趣的部分是：将代码片段放入芯片中，观察SPI管脚SDO和SCAD的输出，SS*信号显示端口正按照预期运行。SS*宽度和SCK时钟正是我设置MSSP来生成的。SDO匹配填充到SSPBUF的字节i。（一切都好）我还试着看SSPIF位（PrIl& lt；3 & gt；）。没有欢乐，也没有显示周期的完成。



      以下为原文

    Set up a simple output routine with the MSSP set up as an SPI master.  Took the code snippet pretty much right from the 18F2620 spec sheet.

Sequence:
Set an output pin LOW to be the target SS* signal.
Load the SSPBUF reg with a byte of data.  (This should initiate a single SPI output cycle)
Watch the BF bit in SSPSTAT until it goes to 1.  (This sez that the send cycle has completed.)
Spin on the BF bit until it goes HIGH.
Read the SSPBUF reg just to clear the BF bit for the next cycle, discard the data.
Set the output pin for SS* back to HIGH.
Wait a bit (test code waits 40 mSec) and repeat the loop.

The problem:  MPLAB SIM never sets the bit.  The code spins forever waiting for the BF bit in SSPSTAT to go HIGH.

The interesting part:  Putting the code snippet into the chip and observing the output from the SPI pins SDO and SCK and the SS* signal shows that the port is behaving exactly as expected.  SS* width and SCK clocks are exactly what I set the MSSP to generate.  SDO matches the byte I stuffed into SSPBUF. (All is good)

I have also tried looking at the SSPIF bit (PIR1<3>).  No joy, it doesn't show the completion of the cycle either.