MRF24J40中断和Rx冲洗问题

您好，我有一个问题的中断线和RX冲洗MRF24J40。我使用的是简单的MiWi P2P驱动程序。中断问题：我使用的是使用PIC32 MX120 F032 B和MRF24J40MD的自定义HW板。在我的情况下，INT PIN是在HW中被拔出的。配置的ITCCON启用RX和Tx中断（11110110），SLPCON0与ITEDGE作为下降沿（0x00）和EDGEGTRAGEGRY在PIC侧和谐下降。在成功广播之后，INTSTAT使TXIF＝1，但我的INTPIN只从3.3V转换到2.45 V，因此它不被识别为中断，因此ISR不会引起。所以我已经更改了代码来查询ItSTAT。即使在RX端，INT只会下降到2.5V，INT不会触发，但是，RXIF也没有设置。刷新问题：只希望在我以前的消息中再加一件事情。我看到RX FIFO即使在每次读取操作之后都给出了下面的命令也不刷新。这是否与RXIF相关，因为RXIF即使在接收到数据之后也没有被设置？有人建议我在上述问题上漏掉什么吗？非常感谢。你的建议对我的工作很有帮助。



      以下为原文

    Hello All,

I have a problem with interrupt line and Rx Flush of MRF24J40. I am using the simple MiWi P2P driver.
Interrupt Issue:
I am using the custom HW Board using PIC32MX120F032B and MRF24J40MD. In my case the INT pin is pulled up in HW. Configured INTCON to enable Rx and Tx Interrupts (11110110), SLPCON0 with INTEDGE as falling edge (0x00) and edge_trigger_falling in HARMony on PIC side. After successful broadcast, INTSTAT enables TXIF=1, but my INT pin is translating from 3.3V to 2.45V only and hence it is not identified as interrupt thus ISR does not evoke. So I have changed the code to polling INTSTAT. And even on the Rx side, the INT only pulls down to 2.5V and INT does not trigger, but, here RXIF is also not set.

Flush Issue:
Just wish to add up one more thing to my previous message. I am seeing that Rx FIFO does not flush even after giving the following command after every read operation.
  lowWrite(WRITE_RXFLUSH,0x01);         // flush RX hw FIFO manually (workaround for silicon errata #1)
  lowWrite(WRITE_BBREG1, 0x00);         // reset RXDECINV to enable radio to receive next packetIs this in any way related to RXIF as RXIF is not being set even after receiving the data?

Can someone suggest if I am missing something on above issues?

Thank you so much. Your suggestion would be very helpful for my work.