PIC18F87J94上的SPI主控器始终读为零

你好，我一直在研究使用SPI在PIC18F87J94和来自ST公司的外部EEPROM模块M95M02-DRMN6TP之间进行通信。我能够在逻辑分析仪和示波器上看到SPI通信，但是由于某些原因，我不能在PIC中得到代码来读取其值。NEED的EEPROM。当BF标志变为真时，SSP1BUF上的值总是0x00。PIC数据表指定SDI/MISO的三态由外围设备管理，因此在下面的代码中，我省略了设置TRIS寄存器。我的经验是，设置TRIS寄存器使得SSP1BUF寄存器总是读取0xFF，而清除寄存器使得它总是读取0x00。有没有可能错过一些显而易见的问题？我觉得我失去了一些小东西，但是很重要。



      以下为原文

    Hello,

I've been working on using SPI to communicate between a PIC18F87J94 and an external EEPROM module from ST, the M95M02-DRMN6TP.

I've been able to see the SPI communication on a logic analyzer and on an oscilloscope, but for some reason, I can't get the code in the PIC to read the value being sent by the EEPROM. The value on SSP1BUF is always 0x00 when the BF flag becomes true.

The PIC datasheet specifies that SDI/MISO's tristate is managed by the peripheral, so in the code below I've omitted setting the TRIS register. My experience has been that setting the TRIS register is causing the SSP1BUF register to always read 0xFF, and clearing the register causes it to always read 0x00.

I've included a sample code file which exhibits the problem and is very closely based on my actual code. Is there any chance I'm missing something obvious that would cause this issue? I feel like I'm missing something small, but important.

/*
* File: main.c
* Author: sysadmin
*
* Created on January 4, 2017, 9:25 PM
*/


    #pragma config STVREN = ON // Stack Overflow/Underflow Reset (Enabled)
    #pragma config XINST = OFF // Extended Instruction Set (Disabled)
    #pragma config BOREN = ON // Brown-Out Reset Enable (Controlled with SBOREN bit, disabled in Deep Sleep)
    #pragma config BORV = 0 // Brown-out Reset Voltage (2.0V)
    #pragma config CP0 = OFF // Code Protect (Program memory is not code-protected)
    #pragma config FOSC = FRCPLL // Oscillator (Fast RC Oscillator with PLL module (FRCPLL))
    #pragma config SOSCSEL = LOW // T1OSC/SOSC Power Selection Bits (Low Power T1OSC/SOSC circuit selected)
    #pragma config CLKOEN = OFF // Clock Out Enable Bit (CLKO output disabled on the RA6 pin)
    #pragma config IESO = OFF // Internal External Oscillator Switch Over Mode (Disabled)
    #pragma config PLLDIV = NODIV // PLL Frequency Multiplier Select bits (96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input))
    #pragma config POSCMD = NONE // Primary Oscillator Select (Primary oscillator disabled)
    #pragma config FSCM = CSECMD // Clock Switching and Monitor Selection Configuration bits (Clock switching is enabled, fail safe clock monitor is disabled)
    #pragma config WPFP = WPFP255 // Write/Erase Protect Page Start/End Boundary (Write Protect Program Flash Page 255)
    #pragma config WPDIS = WPDIS // Segment Write Protection Disable (Disabled)
    #pragma config WPEND = WPENDMEM // Segment Write Protection End Page Select (Write Protect from WPFP to the last page of memory)
    #pragma config WPCFG = WPCFGDIS // Write Protect Configuration Page Select (Disabled)
    #pragma config T5GSEL = T5G // TMR5 Gate Select bit (TMR5 Gate is driven by the T5G input)
    #pragma config CINASEL = DEFAULT// CxINA Gate Select bit (C1INA and C3INA are on their default pin locations)
    #pragma config EASHFT = ON // External Address Shift bit (Address Shifting enabled)
    #pragma config ABW = MM // Address Bus Width Select bits (8-bit address bus)
    #pragma config BW = 16 // Data Bus Width (16-bit external bus mode)
    #pragma config WAIT = OFF // External Bus Wait (Disabled)
    #pragma config IOL1WAY = OFF // IOLOCK One-Way Set Enable bit (the IOLOCK bit can be set and cleared using the unlock sequence)
    #pragma config LS48MHZ = SYSX2 // USB Low Speed Clock Select bit (Divide-by-2 (System clock must be 12 MHz))
    #pragma config MSSPMSK2 = MSK7 // MSSP2 7-Bit Address Masking Mode Enable bit (7 Bit address masking mode)
    #pragma config MSSPMSK1 = MSK7 // MSSP1 7-Bit Address Masking Mode Enable bit (7 Bit address masking mode)
    #pragma config WDTWIN = PS25_0 // Watch Dog Timer Window (Watch Dog Timer Window Width is 25 percent)
    #pragma config WDTCLK = LPRC // Watch Dog Timer Clock Source (Always use INTOSC/LPRC)
    #pragma config WDTPS = 32768 // Watchdog Timer Postscale (1:32768)
    #pragma config WDTEN = OFF // Watchdog Timer Disabled; SWDTEN can control WDT
    #pragma config WINDIS = WDTSTD // Windowed Watchdog Timer Disable (Standard WDT selected; windowed WDT disabled)
    #pragma config WPSA = 128 // WDT Prescaler (WDT prescaler ratio of 1:128)
    #pragma config RETEN = OFF // Retention Voltage Regulator Control Enable (Retention not available)
    #pragma config VBTBOR = OFF // VBAT BOR Enable (VBAT BOR is disabled)
    #pragma config DSBOREN = OFF // Deep Sleep BOR Enable (BOR enabled in Deep Sleep)
    #pragma config DSBITEN = ON // DSEN Bit Enable bit (Deep Sleep is controlled by the register bit DSEN)
    #pragma config DSWDTPS = DSWDTPS1F// Deep Sleep Watchdog Timer Postscale Select (1:68719476736 (25.7 Days))
    #pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer Enable (DSWDT Enabled)
    #pragma config DSWDTOSC = LPRC // DSWDT Reference Clock Select (DSWDT uses LPRC as reference clock)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include
#include
#include

#define EEPROM_SS (LATBbits.LATB0)

uint8_t dummy;

void main(void)
{
    ACTCON = 0x90;
    while (OSCCON2bits.LOCK == 0);
   
    LATA = 0x0;
    LATB = 0x0;
    LATC = 0x0;
    LATD = 0x0;
    LATE = 0x0;
    LATF = 0x0;
    LATG = 0x0;
    LATH = 0x0;
    LATJ = 0x0;
   
    ANCON1 = 0x00;
    ANCON2 = 0x00;
    ANCON3 = 0x00;
   
    TRISA = 0x00;
    TRISB = 0x00;
    TRISC = 0x00;
    TRISD = 0x00;
    TRISE = 0x00;
    TRISF = 0x00;
    TRISG = 0x00;
    TRISH = 0x00;
   
    INTCON2bits.RBPU = 1;
    WPUB = 0xFF;
    PADCFG1 = 0x00;
   
    MEMCONbits.EBDIS = 1;
   
    ODCON1bits.SSP1OD = 0;
   
    LATBbits.LATB0 = 1;
    EEPROM_SS = 1; //Initialize to high for inactive
    //Configure PPS-Lite
    OSCCON2bits.IOLOCK = 0; //Unlock PPS-Lite
    RPOR8_9bits.RPO9R = 0x4; //SDO1 -> RP9
    RPINR8_9bits.SDI1R = 0x6; //SDI -> RP24
    RPOR22_23bits.RPO23R = 0x3; //SCK -> RP23
    RPINR10_11bits.SS1R = 0x9; //Set SS to RP14 to get rid of it
    OSCCON2bits.IOLOCK = 1; //Lock PPS-Lite
   
    PMD1bits.SSP1MD = 0;
   
    SSP1CON1bits.CKP = 0; //Clock idle low
    SSP1STATbits.CKE = 0; //Transmit on Idle->Active
    SSP1STATbits.SMP = 0; //Sample at middle of TX time
   
    SSP1CON1bits.SSPM = 0b0010; // Fosc/64
   
   
    SSP1CON1bits.SSPEN = 1;
   
    dummy = SSP1BUF; //Dump the data in buffer, if any.
   
    while (1)
    {
        //Read the status
        EEPROM_SS = 0;
        SSP1BUF = 5;
        while (SSP1STATbits.BF == 0);
        dummy = SSP1BUF;
        
        SSP1BUF = 255;
        while (SSP1STATbits.BF == 0);
        dummy = SSP1BUF;
        EEPROM_SS = 1;
        
        //This EEPROM seems to like a short quiet period with SS High.
        for (uint8_t i = 0; i < 3; i++);
        
        //Enable Writes
        EEPROM_SS = 0;
        SSP1BUF = 6;
        while (SSP1STATbits.BF == 0);
        dummy = SSP1BUF;
        EEPROM_SS = 1;
        
        //This EEPROM seems to like a short quiet period with SS High.
        for (uint8_t i = 0; i < 3; i++);
        
        //Read the status
        EEPROM_SS = 0;
        SSP1BUF = 5;
        while (SSP1STATbits.BF == 0);
        dummy = SSP1BUF;
        
        SSP1BUF = 255;
        while (SSP1STATbits.BF == 0);
        dummy = SSP1BUF;
        EEPROM_SS = 1;
        
        for (uint8_t i = 0; i < 3; i++);
    }
}

0