PIC18F44K22上的I2C时钟怎么获得

谢谢大家。我会纠正这些问题。我假设通过发出init和启动函数而不发送实际数据将足以监视时钟速度并确保它被正确设置。



      以下为原文

    Thanks all. I will correct those issues.
I assumed that by issuing the init and start function without sending actual data would've been enough to monitor the clock speed and make sure it was set correctly.

叹息。



      以下为原文

   
Sigh.

如上所述，I2C不是这样工作的。时钟信号只在数据发送时才切换。现在将是退一步阅读I2C工作的好时机。http://e.维基百科。org/wiki /i%c2%b2cand alo读取实际的官方I2C规范。



      以下为原文

   


As mentioned, that is NOT how I2C works. The clock signal only switches when data is being sent.
Now would be a really good time to step back and read how I2C works.
https://en.wikipedia.org/wiki/I%C2%B2C
and alo read the actual Official I2C specification

好的，谢谢。当我发送数据时，我现在可以看到正确的时钟在大约100kHz。我现在试图写到APCA9698 40位I2C IO Exp.但是我不能得到银行1端口改变输出到高状态。AD0AD2与GND联系在一起。我附上了我的设置示意图。



      以下为原文

    Ok thanks.
As I send data, I can now see the correct clock at about ~100kHz.
I'm now trying to write to a PCA9698 40-bit I2C IO Exp. but I can't get the bank 1 port to change outputs to high state. 
AD0-AD2 are tied to GND. I've attached a schematic of the setup I have.
 
#include

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
// See 18F44K22 Support Information which contains the pragma config usage and settings.
    
// CONFIG1H
#pragma config FOSC = INTIO7 // Internal oscillator block, CLKOUT function on OSC2
#pragma config PLLCFG = OFF // Oscillator used directly.
#pragma config PRICLKEN = ON // Primary clock enable bit (Primary clock is always enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 285 // Brown Out Reset Voltage bits (VBOR set to 2.85 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<5:0> pins are configured as digital I/O on Reset)
#pragma config CCP3MX = PORTB5 // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = OFF // HFINTOSC Fast Start-up (The system clock is held off until the HFINTOSC is stable)
#pragma config T3CMX = PORTC0 // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTC0 // ECCP2 B output mux bit (P2B is on RC0)
#pragma config MCLRE = EXTMCLR // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
#pragma config DEBUG = OFF // Background Debug Disabled
    
// CONFIG5L
#pragma config CP0 = OFF // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

#define _XTAL_FREQ 16000000L
#define SYS_FREQ 16000000L
#define FCY SYS_FREQ/4
#define I2C2_SCL2 100000

void I2C2_Init(void)
{

    /**************************************************
     SSP2CON1 Configuration
     I2C Master mode, clock = FOSC/(4 * (SSPADD + 1))
     WCOL No collision
     CKP Idle:Low
     SSPEN Synchronous Serial Port Enabled
     *************************************************/
    SSP2CON1 = 0x28;
    
     /**************************************************
     SSP2CON2 Configuration
     SEN: Start condition Idle
     RSEN: Repeated Start condition Idle
     PEN: Stop condition Idle
     RCEN: Receive idle
     *************************************************/
    SSP2CON2 = 0x00; //Reset MSSP Control Register
    
    /**************************************************
     SSPADD Configuration:Baud Rate Generator
     clock = FOSC/(4 * (SSPADD + 1))
     (SYS_FREQ/(4*c))-1
     *************************************************/
    SSP2ADD = (SYS_FREQ/(4*I2C2_SCL2))-1; //SSPADD = 39, FCLOCK = 100kHz
         
    SSP2STAT = 0x80; //Slew rate control disabled.
    SSP2CON3 = 0x00;
    
    PIR3bits.SSP2IF = 0; //Clear the master interrupt flag

}

void I2C2_Wait(void)
{
  while ((SSP2STAT & 0x04) || (SSP2CON2 & 0x1F)); //Transmit is in progress
}

void I2C2_Start(void)
{
    I2C2_Wait();
    SSP2CON2bits.SEN = 1;
    while(SSP2CON2bits.SEN);
}

void I2C2_RepeatStart(void)
{
  I2C2_Wait();
  SSP2CON2bits.RSEN = 1;
}

void I2C2_Stop(void)
{
  I2C2_Wait();
  SSP2CON2bits.PEN = 1;
  while(SSP2CON2bits.PEN);
}

unsigned char I2C2_Slave_ACK(void)
{
  // Return: 1 = Acknowledge was not received from slave
  // 0 = Acknowledge was received from slave
  return(SSP2CON2bits.ACKSTAT);
}

void I2C2_Write(unsigned d)
{
  I2C2_Wait();
  SSP2BUF = d;
  if (SSP2CON1bits.WCOL) // Check for write collision
    return;
  while(SSP2STATbits.BF);
}

unsigned short I2C2_Read(unsigned short a)
{
  unsigned short temp;
  I2C2_Wait();
  SSP2CON2bits.RCEN = 1;
  I2C2_Wait();
  temp = SSP2BUF;
  I2C2_Wait();
  SSP2CON2bits.ACKDT = (a)?0:1;
  SSP2CON2bits.ACKEN = 1;
  while(!SSP2STATbits.BF);
  return temp;
}

void main(void) {
 
OSCCONbits.IRCF = 0b111; //16MHz
OSCCONbits.SCS = 0b10;
OSCTUNEbits.PLLEN = 0b00;
        
    TRISDbits.RD0 = 1; //Configure as input (SCL2)
    TRISDbits.RD1 = 1; //Configure as input (SDA2)

    ANSELDbits.ANSD0 = 0; //Configure as digital (SCL2)
    ANSELDbits.ANSD1 = 0; //Configure as digital (SDA2)
    
    I2C2_Init();
    
    I2C2_Start();
    I2C2_Write(0b01000000); //0x40 Addrs and Write Cmd
    I2C2_Write(0b00011001); //0x19 IOC1 Bank 1 port direction
    I2C2_Write(0b00000000); //Set as output
    I2C2_Stop();
    
    while(1)
    {
    I2C2_Start();
    I2C2_Write(0b01000000); //0x40 Addrs and Write Cmd
    I2C2_Write(0b00001001); //0x09 OP1 select output port bank 1
    I2C2_Write(0b11111111); //Set bank 1 outputs high
    I2C2_Stop();
        __delay_ms(5);
    }
}
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示意图



      以下为原文

    Schematic
   Attached Image(s)

你在第一次尝试中遇到了同样的陷阱，当你写的时候没有检查ACK状态。如果你对你发送的第一个字节没有得到响应，那么继续下去是毫无意义的。你需要修改I2C2SLaveIAK来等待R/W位下降。调用I2C2xWAITE（）将在写入之后执行该操作并检查它。



      以下为原文

    You've fallen into the same trap everyone does on their first attempt, not checking the ACK status when you write.
It's pointless carrying on if you don't get a response to the first byte you send.
 
You need to modify I2C2_Slave_ACK to wait for the R/W bit to fall. Calling I2C2_Wait() will do that
unsigned char I2C2_Slave_ACK(void)
{
  // Return: 1 = Acknowledge was not received from slave
  // 0 = Acknowledge was received from slave
 
  I2C2_Wait();  //wait for R/W bit to fall, which indicates ACK cycle is complete
  return(SSP2CON2bits.ACKSTAT);
}
 
and check it after doing the write.

 
    I2C2_Init();
   
    I2C2_Start();
    I2C2_Write(0b01000000); //0x40 Addrs and Write Cmd
 
    if (I2C2_Slave_ACK)
 
    {
 
        //do something here to indicate an error, and abort.
 
    }
    I2C2_Write(0b00011001); //0x19 IOC1 Bank 1 port direction

注意，如果您检查“图15-28：I2C主模式波形（传输，7或10位地址）”，您会看到BF在8个数据位被发送之后，但在ACK周期结束之前下降。最好是写例程检查SSPIF或R/W，看看循环是否完成，然后ALW。AES读取ACK位并使其成为I2C2X写（）函数的返回值。



      以下为原文

    Note, if you examine "FIGURE 15-28: I2C MASTER MODE WAVEFORM (TRANSMISSION, 7 OR 10-BIT ADDRESS)"
you will see that BF falls after the 8 data bits are sent, but before the ACK cycle finishes.
It would be better for the write routine to check SSPIF or R/W to see if the cycle has complete, and then always read the ACK bit and make it a return value for the I2C2_Write() function.

在我提出建议的变化之后，没有运气。稍后，我将捕获SCL和SDA的作用域波形。



      以下为原文

    No luck yet after the I made the suggested changes. I'll capture scope waveform of SCL and SDA later. 

我注意到，在输入了SCL的PCA9698数据表的表11中，输入/输出SDA逻辑高电平输入电压为0.7VDD - 5.5 V，即VIH的3.5V min。但是我的PIC只有3.3V，这就是我的SCL和SDA拖拉绑在一起，所以这可能是我的问题的一部分。



      以下为原文

    I've noticed that on table 11 of the PCA9698 datasheet that Input SCL; input/output SDA logic HIGH-level input voltage is 0.7VDD - 5.5 V. That's 3.5V min for ViH. But my pic is only 3.3V and that's what I have the SCL and SDA pull ups tied to so this might be part of my issue.

FYI。波特率发生器不启动时钟，直到上升沿SCK线达到数字高阈值（～1/2 VDD）。这一特性使得时钟速度依赖于上拉电阻和任何跟踪电容。下降沿以相同的方式工作，但不是由于主动驱动器的问题。这仍然不能解释50kHz。我希望价值更像90K与10K的上拉。我建议把4.7K换成一个测试。



      以下为原文

    FYI. The baud rate generator does not start clocking until the rising edge SCK line reaches the digital high threshold (~1/2 Vdd). This feature makes the clock speed dependent on the pull up resistors and any trace capacitance. Falling edge works the same way but is not an issue due to active drive. 
 
This still does not explain 50kHz.  I would expect value more like 90k with 10k pull ups. I would recommend changing the to 4.7k to as a test.   

是的，我现在了解时钟速率，这是固定的，谢谢。根据数据表，数字高min阈值是0.7VDD＝3.5V。我将把我的上拉连接到5V而不是3.3V，看看会发生什么。



      以下为原文

    Yes I understand about the clock rate now, that's fixed, thanks.
According to the datasheet the digital high min threshold is 0.7VDD = 3.5V.
I will tie my pull ups to 5V instead of 3.3V and see what happens.

小心那件事…我不认为任何K22 IO引脚是5V容忍当运行与VDD = 3.3V



      以下为原文

   
Be careful with that... I don't think any of the K22 IO pins are 5V tolerant when running with VDD=3.3V
 

嗨，我认为杰瑞是正确的关于VDD以上的I/O信号是不允许的。但是它被允许在5 V下运行整个K22，与IO扩展器相同。此外，扩展器能够与微控制器相同的电源电压工作到2.3 V以下。这可能取决于输出信号Volt。在PX9698扩展器的NXP网站产品页面中，在文档标签中，链接到I2C设计中的应用程序注释104401级别的转换：HTTP://www. NXP.COM/DICONTS/APPLICANTYNOTE/AN1044 1.PDF，显示如何使用IO进行I2C信号的平移翻译。对于每个信号，NE MOSFET晶体管必须在两侧都有上拉电阻。迈西尔



      以下为原文

    Hi,
I think Jerry is correct about I/O signals above Vdd is not allowed.
It is however allowed to run the whole K22  at 5 V,  same as the IO Expander.
 
Also, the expander is able to work with the same supply voltage as the microcontroller down to 2.3 V minimum.
This may depend upon what output signal voltages and currents are needed.
 
In NXP website product page for the PCA9698 expander,
in Documentation tab, there is link to Application Note 104401 Level shifting in I2C design:
http://www.nxp.com/documents/application_note/AN10441.pdf
showing how to make level translation for I2C signals, using just one mosfet transistor for each signal,
there must then be pull-up resistors on both sides.
 
   Mysil
 

我现在一切都在5伏。但我还是不能让扩展器工作。似乎当试图处理设备时，确认是错误的。要么我有一个坏芯片或其他东西被搞砸了。下面是波形的捕获。



      以下为原文

    I have everything at 5V now. But I still can't get the expander to work. It seems as if the acknowledge is incorrect when trying to address the device. Either I have a bad chip or something else is screwed up. Below is capture of the waveform.
   Attached Image(s)

嗨，消息18中的捕获似乎对我很好，发送的地址是7位地址32，R/W位＝0，并且有正确的应答。在ACK信号结束后，SDA线被电阻器拉高直到下一个信号开始。为了将数据传输到扩展器，必须在地址和停止信号序列之间传输数据字节。



      以下为原文

    Hi,
The Capture in message #18 seem good to me,
The address transmitted is 7 bit address 32 with R/W bit ==0, and there is correct ACKnowledge. 
After the ACK  signal is ended, SDA line is pulled high by the resistor until the next signal start.
 
There is No Data in the transmission!
To transmit Data to the expander, you have to transmit Data bytes between address and stop signal sequence.
    while (1)
    {
        int i;
        I2C2_Start();
        I2C2_Write(0x70);                /* Replace with address for your slave device. */
        if ( I2C2_Slave_ACK())    goto Stop;
        I2C2_Write(0x01);                /* Replace with relevant Data for slave device. */
        if ( I2C2_Slave_ACK())    break;
        I2C2_Write(r);                   /* Replace with relevant data. */
        if ( I2C2_Slave_ACK())    break;
Stop:
        I2C2_Stop();
        for ( i=0; i<1000; i++)
            __delay_ms(1);
        r++;
    }
    while (1)
        NOP();   
Regards,
   Mysil

我只是显示了最初的压力。下面是我发送的数据，用于设置银行1的方向寄存器和设置输出的完整镜头，但我仍然无法使它们工作。



      以下为原文

    I just showed the initial strain. Here is a shot of the data I'm sending to setup the direction register for bank 1 and a complete shot of setting the outputs and I still can't get them to work.
 

void main(void) {
int i;

OSCCONbits.IRCF = 0b111; //16MHz
OSCCONbits.SCS = 0b10;
OSCTUNEbits.PLLEN = 0b00;
        
    TRISDbits.RD0 = 1; //Configure as input (SCL2)
    TRISDbits.RD1 = 1; //Configure as input (SDA2)

    ANSELDbits.ANSD0 = 0; //Configure as digital (SCL2)
    ANSELDbits.ANSD1 = 0; //Configure as digital (SDA2)
    
    I2C2_Init();

    while(1)
    {
        
        I2C2_Start();
        I2C2_Write(0x40); //Device Address + Write bit
        if ( I2C2_Slave_ACK())
          __delay_ms(5);
        I2C2_Write(0x19); //Select I/O Configuration registers IOC1 bank 1
        if ( I2C2_Slave_ACK())
         __delay_ms(5);
        I2C2_Write(0x00); //Set IOC1 ports register as output
        if (I2C2_Slave_ACK())
        __delay_ms(5);
        I2C2_Stop();
        
        /*
        I2C2_Start();
        I2C2_Write(0x40); //Device Address + Write bit
        if ( I2C2_Slave_ACK())
          __delay_ms(5);
        I2C2_Write(0x09); //Select I/O Ouput registers OP1 bank 1
        if ( I2C2_Slave_ACK())
         __delay_ms(5);
        I2C2_Write(0xFF);  //Set I/O Ouputs OP1 bank 1 HIGH
        if (I2C2_Slave_ACK())
        __delay_ms(5);
        I2C2_Stop();
        */
                for ( i=0; i<1000; i++)
            __delay_ms(1);
        i++;
    }
        
 }

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