18F97J60使用MCC配置主OSC的难度

您好，我有一个配置25MHz时钟有或没有5倍PLL有困难。我已经创建了一个最小的项目，只有一个“紧”的环，它只振荡一个已知引脚上的输出，我在我的示波器上读取一个35913kHz到355.19kHz的频率。我可以看到一个健康的25MHz正弦波上的OSC1/OSC2引脚考虑。OSCCon＝0x0AsTunt= 0x40i有一个旧的MPLAB 8.92项目，是为一个类似的18F97 J60板编写。对于一个类似的回路，它会在振荡引脚上返回一个健康的1.73MHz频率。我很难理解我做错了什么。MPLAB-X V3.55，XC8 V1.40，MCC V3.23.2



      以下为原文

    Hello.

I am having trouble configuring a 25MHz clock with or without 5x PLL. I have created a minimal project with a 'tight' while loop that only oscillates the output on a known pin I am reading a frequency on that pin of 359.13kHz to 359.19kHz on my oscilloscope. I can see a healthy 25MHz sine wave on the OSC1 / OSC2 pins though.

// Configuration bits: selected in the GUI
// CONFIG1L
#pragma config WDT = OFF // Watchdog Timer Enable bit->WDT disabled (control is placed on SWDTEN bit)
#pragma config STVR = OFF // Stack Overflow/Underflow Reset Enable bit->Reset on stack overflow/underflow disabled
#pragma config XINST = OFF // Extended Instruction Set Enable bit->Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
#pragma config DEBUG = OFF // Background Debugger Enable bit->Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins

// CONFIG1H
#pragma config CP0 = OFF // Code Protection bit->Program memory is not code-protected

// CONFIG2L
#pragma config FOSC = HSPLL // Oscillator Selection bits->HS oscillator, PLL enabled and under software control
#pragma config FOSC2 = ON // Default/Reset System Clock Select bit->Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable->Fail-Safe Clock Monitor disabled
#pragma config IESO = OFF // Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit->Two-Speed Start-up disabled

// CONFIG2H
#pragma config WDTPS = 32768 // Watchdog Timer Postscaler Select bits->1:32768

// CONFIG3L
#pragma config EASHFT = ON // External Address Bus Shift Enable bit->Address shifting enabled; address on external bus is offset to start at 000000h
#pragma config MODE = MM // External Memory Bus->Microcontroller mode, external bus disabled
#pragma config BW = 16 // Data Bus Width Select bit->16-Bit Data Width mode
#pragma config WAIT = OFF // External Bus Wait Enable bit->Wait states for operations on external memory bus disabled

// CONFIG3H
#pragma config CCP2MX = ON // ECCP2 MUX bit->ECCP2/P2A is multiplexed with RC1
#pragma config ECCPMX = ON // ECCP MUX bit->ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3
#pragma config ETHLED = ON // Ethernet LED Enable bit->RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled

#include "mcc.h"


OSCCON = 0x0A
OSCTUNE = 0x40


    TRISEbits.RE1 = 0;
   
    while (1)
    {
        // Add your application code
        LATEbits.LATE1 = ~LATEbits.LATE1;
    }

I have an old MPLAB 8.92 project that was written for a similar 18F97J60 board. For a similar loop this returns a healthy 1.73MHz frequency on the oscillated pin.

I struggle to understand what I am doing wrong?



MPLAB-X v3.55, XC8 V1.40, MCC V3.26.2