DSPIC板不能让PLL工作

时钟切换被禁用。



      以下为原文

   
Clock Switching is disabled.

好的，我会改变的，试试看。还有其他问题吗？



      以下为原文

    Ok, i will change it and try that. Is there any other problem that you see?

我会尝试内部振荡器



      以下为原文

    I'd try internal oscillator then

主振荡器也被禁用了。



      以下为原文

    And

Primary Oscillator is disabled, too.

海伊



      以下为原文

    heyy
 
try this #pragma config PLLKEN = OFF // PLL Lock Enable bit (Clock switch will not wait for the PLL lock signal.)


regards,

仍然有问题



      以下为原文

    Still having the problem 
 

#include
#include "common.h"

//#define OSC_INTERNAL
// FICD
#pragma config ICS = PGD2 // ICD Communication Channel Select bits (Communicate on PGEC2 and PGED2)
#pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = ON // Alternate I2C1 pins (I2C1 mapped to ASDA1/ASCL1 pins)
#pragma config ALTI2C2 = ON // Alternate I2C2 pins (I2C2 mapped to ASDA2/ASCL2 pins)
#pragma config WDTWIN = WIN75 // Watchdog Window Select bits (WDT Window is 75% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = OFF // PLL Lock Enable bit (Clock switch will not wait for the PLL lock signal.)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FOSC
#pragma config POSCMD = XT
#pragma config FCKSM = CSECMD
#pragma config OSCIOFNC = ON
#pragma config IOL1WAY = OFF

// FOSCSEL
#pragma config FNOSC = FRC
#pragma config PWMLOCK = ON
#pragma config IESO = OFF

// FGS
#pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF // General Segment Code-Protect bit (General Segment Code protect is Disabled)

int main(void) {
    // Disable Watch Dog Timer
    RCONbits.SWDTEN = 0;
    // Configure PLL prescaler, PLL postscaler, PLL divisor
    PLLFBD = 46; // M=48
    CLKDIVbits.PLLPOST = 0; // N2=2
    CLKDIVbits.PLLPRE = 0; // N1=2
    // Initiate Clock Switch to Primary Oscillator with PLL (NOSC=0b011)
    __builtin_write_OSCCONH(0x03);
    __builtin_write_OSCCONL(0x00);
    OSCCONbits.OSWEN = 1;
    // Wait for Clock switch to occur
    while (OSCCONbits.COSC != 0b011);
    // Wait for PLL to lock
    while (OSCCONbits.LOCK != 1);

    TRISAbits.TRISA7 = OUTPUT;
    TRISAbits.TRISA10 = OUTPUT;
    
    LATAbits.LATA10 = 1;
    while (1) {
        __delay_ms(500);
        LATAbits.LATA10 = 1;
        LATAbits.LATA7 = 1;
        __delay_ms(500);
        LATAbits.LATA10 = 1;
        LATAbits.LATA7 = 0;
        // Add your application code
    }
}

 

在另一个文件中尝试这一点，别忘了在My.C Prd2中的PGD2A* PrdA2 PrAgMac配置文件JTAGEN＝OF//FPORα-PrimaMatlab配置文件BRONE=＝O.PrimaMac配置文件ALTI2C1= OffyApRiga配置文件ALTI2C2= OFF Prima配置文件WDMPON= WI25//FWDTπPracMA配置文件WDTPOS= PS327 68μPrimaA配置WDPRE＝Pr128- Prima-FigdIn＝Off-TracMig-COMFIG＝OFFDTEN＝OF//OFSC。GiiSO＝O//FGSα-PrAPMA配置GWRP＝Off-Tyraca配置GCP= OFF



      以下为原文

    try this in another file ,and don't forget to include in main.c
 
#pragma config ICS = PGD2              
#pragma config JTAGEN = OFF           

// FPOR
#pragma config BOREN = ON              
#pragma config ALTI2C1 = OFF          
#pragma config ALTI2C2 = OFF           
#pragma config WDTWIN = WIN25          
// FWDT
#pragma config WDTPOST = PS32768       
#pragma config WDTPRE = PR128        
#pragma config PLLKEN = ON          
#pragma config WINDIS = OFF            
#pragma config FWDTEN = OFF            

// FOSC
#pragma config POSCMD = NONE          
#pragma config OSCIOFNC = OFF         
#pragma config IOL1WAY = ON            
#pragma config FCKSM = CSECMD         

// FOSCSEL
#pragma config FNOSC = FRCDIVN       
#pragma config PWMLOCK = OFF         
#pragma config IESO = ON             

// FGS
#pragma config GWRP = OFF          
#pragma config GCP = OFF    

FRC没有问题。我想，我的问题是水晶本身。无论如何，用这个代码改变我的水晶作品：



      以下为原文

    There is no problem with the frc. I think, my problem is the crystal itself. Anyway, changing the crystal works for me with this code:
 // FICD
#pragma config ICS = PGD2 // ICD Communication Channel Select bits (Communicate on PGEC2 and PGED2)
#pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = OFF // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25 // Watchdog Window Select bits (WDT Window is 25% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FOSC
#pragma config POSCMD = XT // Primary Oscillator Mode Select bits (XT Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)

// FOSCSEL
#pragma config FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC))
#pragma config PWMLOCK = ON // PWM Lock Enable bit (Certain PWM registers may only be written after key sequence)
#pragma config IESO = OFF // Two-speed Oscillator Start-up Enable bit (Start up with user-selected oscillator source)

// FGS
#pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF // General Segment Code-Protect bit (General Segment Code protect is Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
//

#include "myGeneralDefines.h"

int main(void) {
    //
    /****************************************************************************
     * Setting the Output Latch SFR(s)
     ***************************************************************************/
    LATA = 0x0000;
    LATB = 0x0000;
    LATC = 0x0000;

    /****************************************************************************
     * Setting the GPIO Direction SFR(s)
     ***************************************************************************/
    TRISA = 0x0317;
    TRISB = 0xFFFF;
    TRISC = 0x03FF;

    /****************************************************************************
     * Setting the Weak Pull Up and Weak Pull Down SFR(s)
     ***************************************************************************/
    CNPDA = 0x0000;
    CNPDB = 0x0000;
    CNPDC = 0x0000;
    CNPUA = 0x0000;
    CNPUB = 0x0000;
    CNPUC = 0x0000;

    /****************************************************************************
     * Setting the Open Drain SFR(s)
     ***************************************************************************/
    ODCA = 0x0000;
    ODCB = 0x0000;
    ODCC = 0x0000;

    /****************************************************************************
     * Setting the Analog/Digital Configuration SFR(s)
     ***************************************************************************/
    ANSELA = 0x0013;
    ANSELB = 0x010F;
    ANSELC = 0x0007;
    //
    //

    // Configure Oscillator to operate the device at 60Mhz
    // Fosc= Fin*M/(N1*N2), Fcy=Fosc/2
    // Fosc= 8M*60/(2*2)=120Mhz for 8M input clock
    PLLFBD = 58; // M=60
    CLKDIVbits.PLLPOST = 0; // N1=2
    CLKDIVbits.PLLPRE = 0; // N2=2
    OSCTUN = 0; // Tune FRC oscillator, if FRC is used

    // Disable Watch Dog Timer
    RCONbits.SWDTEN = 0;

    // Clock switching to incorporate PLL
    __builtin_write_OSCCONH(0x03); // Initiate Clock Switch to Primary

    // Oscillator with PLL (NOSC=0b011)
    __builtin_write_OSCCONL(OSCCON || 0x01); // Start clock switching
    while (OSCCONbits.COSC != 0b011);

    // Wait for Clock switch to occur
    // Wait for PLL to lock
    while (OSCCONbits.LOCK != 1) {
    };

    //
    while (1) {
        LATAbits.LATA7 = 1;
        LATAbits.LATA10 = 1;
        __delay_ms(100);
        LATAbits.LATA7 = 0;
        LATAbits.LATA10 = 0;
        __delay_ms(100);
    }
    return 0;
}

嗨，你的配置位ALENOTHORIDE…如果你想选择一个外部XTAL（假设你在你的板上有一个），你必须使用下面的配置：



      以下为原文

    Hi,
your configuration bits are not correct...
If you want to select an external XTAL (assuming you have one on your board) you must use the following configuration
 
#pragma CONFIG FNOSC = PRI
or
#pragma CONFIG FNOSC = PRIPLL   (if you want to use PLL with XT XTAL) 
Regards

这也是一个特别的奖项：



      以下为原文

    This one also deserves a special award:
#define OUTPUT 1
#define INPUT 0
...
    TRISAbits.TRISA7 = OUTPUT;
    TRISAbits.TRISA10 = OUTPUT;

乌尔克



      以下为原文

    urk