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在内部RAM的DA系列的使用和正确布线方面，DOCS似乎有点弱。内部RAM的正确布线是什么？需要一个1.8V的接地和电源，还是什么？它说，“没有DDR”是什么意思？有没有人手里拿着这些东西，在一个项目上值得冒这样的风险吗？
以上来自于百度翻译 以下为原文 Docs seems a bit weak on the use and proper wiring of a DA series with internal ram. What is the correct wiring for internal ram? Will it need a 1.8v ground and supply, or what? It says 2: This pin must be tied to Vss through a 20k resistor in devices without DDR. So what does it mean, "Without DDR"? Does anyone have one of these in hand, is it worth risking a new chip like this on a project? 
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19个回答
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由于DA没有公开发布，所以你需要联系给他们的F.A.E.。
以上来自于百度翻译 以下为原文 Since the DA is not in public release you would need to contact the F.A.E. that gave them to you. The are still only Engineering sames for now. |
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这当然意味着“没有DDR控制器”，DM3200和DM3200。我没有它们。
以上来自于百度翻译 以下为原文 This certainly means "without DDR controller". DM-320008 and DM-320010. I don't have them. |
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HTTP//WW1.MICCHIP.COM/DeLoSt/En/DeVICECD/O7000 05311A.PDFE是EVE板示意图，这是一个安静的版本。
以上来自于百度翻译 以下为原文 http://ww1.microchip.com/downloads/en/DeviceDoc/70005311A.pdfThere is the Eval Board schematic.That is a Quiet release. |
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这当然意味着“没有DDR控制器”。这没有任何意义，它们都有内部DDR或外部总线。它不清楚。我买了一个启动工具包，但它不清楚，如果它甚至附带插件模块。
以上来自于百度翻译 以下为原文 This certainly means "without DDR controller". That doesn't make any sense, they all either have internal ddr or an external bus. Its just not clear. I purchased one of the starter kits, buts its not clear if it even comes with the plugin module. |
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我现在看到，我订购的010-C附带内部DDR。
以上来自于百度翻译 以下为原文 I see now that the 010-c that I ordered comes with the internal ddr. |
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根据数据表开头的表，169/176个引脚部分中的一半根本没有数据。其余的都有内部DDR。288个引脚部分有外部DDR。
以上来自于百度翻译 以下为原文 According to the table at the beginning of the datasheet, half of the 169/176-pin parts do not have DDR at all. The rest have internal DDR. 288-pin parts have external DDR. |
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对DDR2接口的临时约束是我的一个演示插件。看来我将等待硅版2。
以上来自于百度翻译 以下为原文 The temp constraints on DDR2 interface is a show stopper for me. Looks like I will be waiting for silicon version 2. |
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然而，对于一个室内项目，我看不出为什么0—70会是个问题。对我来说，另一种选择是使用MZ EF系列的2到4个外部PSRAM，使电路板正确旋转是一个挑战，加上布线少的优点，也许允许4层PCB。如果这工作如广告，32 MB的板上RAM是一个真正的加号，一个人可以做一些实际的工作。我在这里看到的并没有太多的东西在记忆中。
以上来自于百度翻译 以下为原文 For an indoor project though, I can't see why 0-70 would be a problem. The alternative for me is 2 to 4 external psram with the mz ef series, and getting the board spun right is a challenge, plus the advantage of much less routing, maybe allowing a 4 layer pcb. If this works as advertised, 32mb of onboard ram is a real plus, a person can do some real work with this, and there isn't really much else out there that I have seen that has this kind of built in memory. |
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是的，室内的。我的项目都是室外的，这就是为什么我如此迷茫。我真的很期待处理器的原因你概述。
以上来自于百度翻译 以下为原文 Yes for indoor. My projects are all outdoor that's why I am so bummed. I really was looking forward to processor for reasons you outlined. |
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示意图列出了50个用于PHY的MHZ振荡器（在许多地方），但是LAN840A数据表表示它只能接受25兆赫。怎么会？
以上来自于百度翻译 以下为原文 The schematic lists 50 MHz oscillator for PHY (in numerous places), but the LAN8740A datasheet says it can only accept 25 MHz. How come? |
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嗨，在RMII模式中，我认为需要有50MHz时钟（见LAN840A数据表表5-12页122）。
以上来自于百度翻译 以下为原文 Hi, In RMII mode I think it is needed to have 50MHz clock (see table 5-12 page 122 of LAN8740A datasheet) Regards |
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看起来第5.7章在RMII模式中并不适用。对吗？
以上来自于百度翻译 以下为原文 Looks like chapter 5.7 doesn't really apply in the RMII mode. Right? |
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嗨，数据表看起来有点混乱；如果你看一下图1-2页，你可以看到你可以使用XTAL或CLKIN。如果你看第5.4.4.1页第123页，它显示RMIISo必须是标称50MHz的，我的解释是25MHz XTAL可以用于MII和50MHz外部。时钟必须用于RMII。也许值得检查与微芯片技术支持确认……
以上来自于百度翻译 以下为原文 Hi, Datasheet seems a bit confusing ;=) If you look at the figure 1-2 page 5 you can see that you can either use a XTAL or CLKIN. If you look at the chapter 5.6.4.1 page 123 it shows that CLKIN must be nominal 50MHz for RMII So my interpretation is that 25MHz XTAL can be used for MII and 50MHz external CLOCK must be used for RMII. Maybe worth to check with Microchip technical support for confirmation... Regards |
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我在勘误表中看到，VBAT引脚不适用于第一个版本，SSOC不能与水晶一起使用。我需要使用一个外部RTC。：）
以上来自于百度翻译 以下为原文 I've seen in the errata that the Vbat pin is not working for the first versions, and the SOSC cannot be used with a crystal. I would need to use an external RTC for that. :) |
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这很令人困惑，但我认为你是对的。我要用50兆赫。
以上来自于百度翻译 以下为原文 It's confusing, but I think you're right. I'll go with 50 MHz. |
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我在问同样的问题，但我认为很明显，如果芯片内部有DDR，这些线路必须连接到1.8V，因为芯片需要DDR控制器模块的电源。我在QFP 176引脚（小教练机）双面PCB的PCB设计中工作，我将把它们连接到1.8V。
以上来自于百度翻译 以下为原文 I´m asking the same question, but I think it´s obvious that if the chip has internal DDR those lines must be connected to 1.8v because chip needs power for the DDR controller module. I´m working in a PCB design for QFP 176 pin (small trainer) double side PCB and I will connect them to 1.8v. |
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我还没决定是用176引脚TQFP还是169引脚BGA呢？看起来像DDR1V8和VDDCARD一样需要1.8V的轨道，但是我还没弄清楚要提供多少电流。根据所涉及的引脚数，这一定是很多。不要忘记将DDRVRF连接到VTT，VTT是1.8V轨道的一半-必须用电阻分叉或类似的方式来跟随可能在DDR1V8上的任何纹波。根据勘误表，内部VTT不能正常工作。DEV板使用1K电阻器来建立分流。
以上来自于百度翻译 以下为原文 I haven't decided whether to go with 176-pin TQFP or 169-pin BGA yet. Looks like you need the 1.8V rail for both DDR1V8 and VDDCore, but I haven't figured out how much current to supply yet. Judging by the number of pins involved, this must be a lot. Don't forget to attach DDRVRef to VTT, which is half of the 1.8V rail - must be done with resistive divide or alike to follow any ripple that may be on DDR1V8. According to the errata, the internal VTT doesn't work. The dev board uses 1K resistors to build the divide. |
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